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+3 votes
973 views

The $FSM$ (Finite State Machine) machine pictured in the figure above

  1. Complements a given bit pattern
  2. Finds $2's$ complement of a given bit pattern
  3. Increments a given bit pattern by $1$ 
  4. Changes the sign bit
asked in Theory of Computation by Veteran (377k points)
edited by | 973 views
0
(d) ?
0
Despite the error in the FSM, ISRO didn't change the key or discard the question.

2 Answers

+6 votes

I think there is some error in the diagram. If DFA had been like this :

.

Ans:(c) Increments a given bit pattern by 1.

answered by Loyal (9.9k points)
0
If anything is right this should be the most probable. Otherwise None. :)
0
If the input is: 1011.

What will be output?

Since the diagram is ambiguous then it should be reported.
+1
i can take objection in this question ma'am.bcoz of fig misprint .i marked option A
+1
If input is 1010, the output is 0110. I don't understand how is this FSM increasing the bit pattern by 1.
0
Let's taken an example

input 1011

start from right (1101) and analyze with machine output tends to be 0011 now back to the original way it means 1100.

And if you add 1 with actual input 1011 +1 = 1100.
0 votes
  1. D ans
answered by (283 points)
Answer:

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