0 0 votes CO & Architecture + – talha hashim 507 views answer comment Share Follow Print See all 2 Comments 2 2 Comments reply SHUBHAM SHASTRI commented Aug 30, 2018 reply Follow flag 11 is the correct answer...but the dig is wrong ...at I3 CC4 they can do decode but they dont ...but final answer is correct 0 0 replyShare talha hashim commented Aug 30, 2018 reply Follow flag I2 Will decode during WB stage of I1 .....but they are given during EX stage that is wrong because data will be available for decode during WB stage of I1 for I2 because I1 involve memory operation 0 0 replyShare Please log in or register to add a comment.
