Gate

Question

Whether Vectored Interrupts are possible on CPU having single Interrupt Request line and a single interrupt grant line?

Comments

daisy chaining is single Interrupt Request line and a single interrupt grant line

Answer 1

Possible....

vector address is transmitted by data bus.. when...the cpu becomes ready to accept interrupt it activates INTA line. Then IO device responds by spending its vector code into the data bus and turning off the INTR signal.