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Recent questions tagged process-and-threads

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Andrew S. Tanenbaum (OS) Edition 4 Exercise 2 Question 17 (Page No. 175)
In this problem, you are to compare reading a file using a single-threaded file server and a multithreaded server. It takes $12$ msec to get a request for ... /sec can the server handle if it is single threaded? If it is multithreaded?
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Andrew S. Tanenbaum (OS) Edition 4 Exercise 2 Question 16 (Page No. 175)
Can a thread ever be preempted by a clock interrupt? If so, under what circumstances? If not, why not?
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Andrew S. Tanenbaum (OS) Edition 4 Exercise 2 Question 15 (Page No. 175)
Why would a thread ever voluntarily give up the CPU by calling thread yield? After all, since there is no periodic clock interrupt, it may never get the CPU back.
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Andrew S. Tanenbaum (OS) Edition 4 Exercise 2 Question 14 (Page No. 175)
In Fig. $2-12$ the register set is listed as a per-thread rather than a per-process item. Why? After all, the machine has only one set of registers.
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Andrew S. Tanenbaum (OS) Edition 4 Exercise 2 Question 13 (Page No. 174)
In the text, we described a multithreaded Web server, showing why it is better than a single-threaded server and a finite-state machine server. Are there any circumstances in which a single-threaded server might be better? Give an example.
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Andrew S. Tanenbaum (OS) Edition 4 Exercise 2 Question 12 (Page No. 174)
In Fig. $2-8$, a multithreaded Web server is shown. If the only way to read from a file is the normal blocking read system call, do you think user-level threads or kernel-level threads are being used for the Web server? Why?
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Andrew S. Tanenbaum (OS) Edition 4 Exercise 2 Question 11 (Page No. 174)
If a multithreaded process forks, a problem occurs if the child gets copies of all the parent's threads. Suppose that one of the original threads was ... one in each process. Does this problem ever occur in single-threaded processes?
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Andrew S. Tanenbaum (OS) Edition 4 Exercise 2 Question 10 (Page No. 174)
In the text it was stated that the model of Fig. $2-11(a)$ was not suited to a file server using a cache in memory. Why not? Could each process have its own cache?
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Andrew S. Tanenbaum (OS) Edition 4 Exercise 2 Question 9 (Page No. 174)
Assume that you are trying to download a large $2$-GB file from the Internet. The file is available from a set of mirror servers, each of which can ... bytes of the file. Explain how you might use threads to improve the download time.
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Andrew S. Tanenbaum (OS) Edition 4 Exercise 2 Question 8 (Page No. 174)
Consider a multiprogrammed system with degree of $6$ (i.e., six programs in memory at the same time). Assume that each process spends $40\%$ of its time waiting for I/O. What will be the CPU utilization?
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Andrew S. Tanenbaum (OS) Edition 4 Exercise 2 Question 7 (Page No. 174)
Multiple jobs can run in parallel and finish faster than if they had run sequentially. Suppose that two jobs, each needing $20$ minutes of CPU time, start simultaneously. How ... ? How long if they run in parallel? Assume $50\%$ I/O wait.
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Andrew S. Tanenbaum (OS) Edition 4 Exercise 2 Question 6 (Page No. 174)
A computer has $4$ GB of RAM of which the operating system occupies $512$ MB. The processes are all $256$ MB (for simplicity) and have the same characteristics. ... $99\%$ CPU utilization, what is the maximum I/O wait that can be tolerated?
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Andrew S. Tanenbaum (OS) Edition 4 Exercise 2 Question 5 (Page No. 174)
A computer system has enough room to hold five programs in its main memory. These programs are idle waiting for I/O half the time. What fraction of the CPU time is wasted?
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Andrew S. Tanenbaum (OS) Edition 4 Exercise 2 Question 4 (Page No. 174)
When an interrupt or a system call transfers control to the operating system, a kernel stack area separate from the stack of the interrupted process is generally used. Why?
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Andrew S. Tanenbaum (OS) Edition 4 Exercise 2 Question 3 (Page No. 174)
On all current computers, at least part of the interrupt handlers are written in assembly language. Why?
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Andrew S. Tanenbaum (OS) Edition 4 Exercise 2 Question 2 (Page No. 174)
Suppose that you were to design an advanced computer architecture that did process switching in hardware, instead of having interrupts. What information would the CPU need? Describe how the hardware process switching might work.
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Andrew S. Tanenbaum (OS) Edition 4 Exercise 2 Question 1 (Page No. 174)
In Fig. $2-2$, three process states are shown. In theory, with three states, there could be six transitions, two out of each state. However, ... Are there any circumstances in which either or both of the missing transitions might occur?
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GATE Overflow | Mock GATE | Test 1 | Question: 12
Consider a parent process $P$ that has forked a child process $C$. $C$ has again forked another child process $D$. Now $P$ terminates while $C$ ... $P$ immediately becomes an orphan process, until adopted by its parent
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Test by Bikram | Mock GATE | Test 1 | Question: 12
Which of the following should be allowed only in Kernel mode? Changing mapping from virtual to physical address Mask and unmask interrupts Disabling all interrupts Reading processor status register ... $(iii)$, $(iv)$, $(v)$ and $(vi)$
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