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Recent questions tagged interrupts

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GATE CSE 2023 | Question: 24
A keyboard connected to a computer is used at a rate of $1$ keystroke per second. The computer system polls the keyboard every $10 \mathrm{~ms}$ (milli seconds) to check for a keystroke and consumes $100\; \mu \mathrm{s}$ (micro seconds) for ... interrupt and processing a keystroke. The ratio $\dfrac{T_{1}}{T_{2}}$ is _____________. (Rounded off to one decimal place)

admin asked in CO and Architecture Feb 15

by admin

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COA
Which of the following is/are true for a CPU which does not have any stack pointer registers? A Interrupts are not possible. B All subroutine calls and interrupts are possible. C It cannot have nested subroutines call. D It cannot have subroutine call instruction.

Overflow04 asked in CO and Architecture Jan 25

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2 votes

2 answers

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I/O Modes | Process State Transition | COA & OS
MSQ A ‘Running’ process is surely put into ‘Blocked/Wait’ state during while requesting for an I/O, in which of the following I/O modes? Synchronous I/O Asynchronous I/O Interrupt Driven I/O DMA

Souvik33 asked in CO and Architecture Dec 2, 2022

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Both internal and software interrupts are same ? Example : system call
Both internal and software caused by executing the program instructions . So both are same ?

its_vv asked in CO and Architecture Jul 1, 2022

by its_vv

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1 answer

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NIELIT 2016 DEC Scientist B (CS) - Section B: 39
External Interrupt may not arise because of illegal or erroneous use of an instruction. a timing device. external source. I/O devices.

Lakshman Patel RJIT asked in CO and Architecture Mar 31, 2020

by Lakshman Patel RJIT

1.1k views

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1 answer

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NIELIT 2017 DEC Scientist B - Section B: 49
Which of the following is false? Interrupts which are initiated by an instruction are software interrupts When a subroutine is called, the address of the instruction following the CALL instruction is stored in the stack pointer A micro program which is written as $0$’s and $1$’s is a binary micro program None of the options

Lakshman Patel RJIT asked in CO and Architecture Mar 30, 2020

by Lakshman Patel RJIT

1.1k views

1 vote

3 answers

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UGC NET CSE | January 2017 | Part 3 | Question: 1
Which of the following is an interrupt according to temporal relationship with system clock? Maskable interrupt Periodic interrupt Division by zero Synchronous interrupt

go_editor asked in CO and Architecture Mar 24, 2020

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9 votes

1 answer

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GATE CSE 2020 | Question: 3
Consider the following statements. Daisy chaining is used to assign priorities in attending interrupts. When a device raises a vectored interrupt, the CPU does polling to identify the source of interrupt. In polling, the CPU periodically checks the status bits to know if any ... . Which of the above statements is/are TRUE? Ⅰ and Ⅱ only Ⅰ and Ⅳ only Ⅰ and Ⅲ only Ⅲ only

Arjun asked in CO and Architecture Feb 12, 2020

by Arjun

6.3k views

2 votes

1 answer

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Andrew S. Tanenbaum (OS) Edition 4 Exercise 5 Question 37 (Page No. 432)
The clock interrupt handler on a certain computer requires $2\: msec$ (including process switching overhead) per clock tick. The clock runs at $60\: Hz.$ What fraction of the CPU is devoted to the clock?

Lakshman Patel RJIT asked in Operating System Oct 28, 2019

by Lakshman Patel RJIT

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Andrew S. Tanenbaum (OS) Edition 4 Exercise 5 Question 11 (Page No. 430)
A computer has a three-stage pipeline as shown in Fig. 1-7(a). On each clock cycle, one new instruction is fetched from memory at the address pointed to by the PC and put into the pipeline and ... instruction of the interrupt handler is fetched into the pipeline. Does this machine have precise interrupts? Defend your answer.

Lakshman Patel RJIT asked in CO and Architecture Oct 28, 2019

by Lakshman Patel RJIT

662 views

1 vote

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Andrew S. Tanenbaum (OS) Edition 4 Exercise 5 Question 10 (Page No. 430)
In Fig. 5-9(b), the interrupt is not acknowledged until after the next character has been output to the printer. Could it have equally well been acknowledged right at the start of the interrupt service procedure? If so, give one reason for doing it at the end, as in the text. If not, why not?

Lakshman Patel RJIT asked in Operating System Oct 28, 2019

by Lakshman Patel RJIT

283 views

2 votes

0 answers

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Andrew S. Tanenbaum (OS) Edition 4 Exercise 5 Question 9 (Page No. 430)
CPU architects know that operating system writers hate imprecise interrupts. One way to please the OS folks is for the CPU to stop issuing new instructions when an interrupt is signaled, but allow all the ... executed to finish, then force the interrupt. Does this approach have any disadvantages? Explain your answer.

Lakshman Patel RJIT asked in Operating System Oct 28, 2019

by Lakshman Patel RJIT

308 views

2 votes

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Andrew S. Tanenbaum (OS) Edition 4 Exercise 5 Question 8 (Page No. 430)
Suppose that a computer can read or write a memory word in $5 nsec.$ Also suppose that when an interrupt occurs, all $32$ CPU registers, plus the program counter and PSW are pushed onto the stack. What is the maximum number of interrupts per second this machine can process?

Lakshman Patel RJIT asked in Operating System Oct 28, 2019

by Lakshman Patel RJIT

214 views

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Andrew S. Tanenbaum (OS) Edition 4 Exercise 5 Question 4 (Page No. 429)
Explain the tradeoffs between precise and imprecise interrupts on a superscalar machine.

Lakshman Patel RJIT asked in Operating System Oct 28, 2019

by Lakshman Patel RJIT

263 views

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1 answer

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Andrew S. Tanenbaum (OS) Edition 4 Exercise 2 Question 31 (Page No. 176)
How could an operating system that can disable interrupts implement semaphores?

Lakshman Patel RJIT asked in Operating System Oct 25, 2019

by Lakshman Patel RJIT

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Andrew S. Tanenbaum (OS) Edition 4 Exercise 2 Question 22 (Page No. 175)
Suppose that an operating system does not have anything like the select system call to see in advance if it is safe to read from a file, pipe, or device, but it does allow alarm clocks to be set that interrupt blocked system calls. Is it possible to implement a threads package in user space under these conditions? Discuss.

Lakshman Patel RJIT asked in Operating System Oct 25, 2019

by Lakshman Patel RJIT

316 views

0 votes

1 answer

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Andrew S. Tanenbaum (OS) Edition 4 Exercise 2 Question 21 (Page No. 175)
Consider a system in which threads are implemented entirely in user space, with the run-time system getting a clock interrupt once a second. Suppose that a clock interrupt occurs while some thread is executing in the run-time system. What problem might occur? Can you suggest a way to solve it?

Lakshman Patel RJIT asked in Operating System Oct 25, 2019

by Lakshman Patel RJIT

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1 answer

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Andrew S. Tanenbaum (OS) Edition 4 Exercise 2 Question 16 (Page No. 175)
Can a thread ever be preempted by a clock interrupt? If so, under what circumstances? If not, why not?

Lakshman Patel RJIT asked in Operating System Oct 24, 2019

by Lakshman Patel RJIT

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1 answer

19

Andrew S. Tanenbaum (OS) Edition 4 Exercise 2 Question 15 (Page No. 175)
Why would a thread ever voluntarily give up the CPU by calling thread yield? After all, since there is no periodic clock interrupt, it may never get the CPU back.

Lakshman Patel RJIT asked in Operating System Oct 24, 2019

by Lakshman Patel RJIT

1.3k views

1 vote

1 answer

20

Andrew S. Tanenbaum (OS) Edition 4 Exercise 2 Question 3 (Page No. 174)
On all current computers, at least part of the interrupt handlers are written in assembly language. Why?

Lakshman Patel RJIT asked in Operating System Oct 24, 2019

by Lakshman Patel RJIT

1.7k views

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1 answer

21

Andrew S. Tanenbaum (OS) Edition 4 Exercise 2 Question 2 (Page No. 174)
Suppose that you were to design an advanced computer architecture that did process switching in hardware, instead of having interrupts. What information would the CPU need? Describe how the hardware process switching might work.

Lakshman Patel RJIT asked in Operating System Oct 24, 2019

by Lakshman Patel RJIT

584 views

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22

Andrew S. Tanenbaum (OS) Edition 4 Exercise 1 Question 16 (Page No. 82)
When a user program makes a system call to read or write a disk file, it provides an indication of which file it wants, a pointer to the data buffer, and the count. Control is then transferred to the operating ... What about the case of writing to the disk? Need the caller be blocked awaiting completion of the disk transfer?

Lakshman Patel RJIT asked in Operating System Oct 23, 2019

by Lakshman Patel RJIT

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23

Self-Doubt Priority interrupts
Under the SOFTWARE METHOD – POLLING heading. What is the meaning of this line? “In this method, all interrupts are serviced by branching to the same service program”. https://www.geeksforgeeks.org/priority-interrupts-sw-polling-daisy-chaining/

amitqy asked in CO and Architecture Feb 16, 2019

by amitqy

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24

MadeEasyTestSeries
Consider a system employing interrupt driven IO for a particular device that transfer data at a rate of 8KB/sec continuously. Consider interrupt processing time about 100 microsec. The fraction of processor time consumed by this IO if interrupt occurs on every byte is ______?

dharmesh7 asked in CO and Architecture Jan 26, 2019

179 views

4 votes

1 answer

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Applied Course | Mock GATE | Test 1 | Question: 62
Consider a $32$ bit, $10$ MIPS processor with an interrupt driven interface. Suppose a hard disk has a $16$ bit data bus and is connected to the processor and its transfer rate is $50 \:KB$ per second. ... instructions per second) $256000$ instructions per second $512000$ instructions per second $1024000$ instructions per second None of the above

Applied Course asked in CO and Architecture Jan 16, 2019

by Applied Course

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2 votes

1 answer

26

Interrupt Service Routing ( Applied course Mock 3)
Consider a process P1 that is executing on a Linux-like OS on a single core system. When P1 is executing, a disk interrupt occurs, causing P1 to go to kernel mode to service that interrupt. The interrupt delivers all the disk blocks that unblock ... is ready P1 is ready and P2 is running P1 is running and P2 is ready P1 is blocked and P2 is ready

Mk Utkarsh asked in Operating System Jan 15, 2019

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27

UPPCL AE 2018:19
Consider the following statements regarding interrupts. If a process is interrupted during system call handling then the $\text{OS}$ will crash. If a process is interrupted during system call handling then the process is moved to the $\text{READY}$ queue. If an interrupt handler is ... of the above $\text{III}$ only $\text{II}$ and $\text{III}$ $\text{I}$ and $\text{III}$

Lakshman Patel RJIT asked in Operating System Jan 5, 2019

by Lakshman Patel RJIT

123 views

1 vote

2 answers

28

DMA,interrupts
True/false 1. To access bus the DMA does not issue an interrupt it is done through DMA-request and DMA-acknowledge wires. Interrupt is issued by DMA to CPU only after complete data is transferred to the specific memory address by DMA. 2. DMA interrupts the CPU whenever it needs to initiate I/O and also when it has finished I/O transfers.

Gurdeep Saini asked in CO and Architecture Jan 4, 2019

by Gurdeep Saini

788 views

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