1 1 vote Hi Guys, In most of the books it is mentioned that PC contains the starting address of instruction. And during the fetch cycle it is incremented and it points to the next instruction. is this always TRUE ? But I have one doubt - Let us assume we have One Word, Two Word and Three Word instructions in our computer then before ID(instruction decode) phase how do we know how much PC should be incremented because in IF phase we do not know - how many words does current instruction take ? CO & Architecture co-and-architecture + – Chhotu 2.0k views answer comment Share Follow Print See all 2 Comments 2 2 Comments reply Rishabh Gupta 2 commented Dec 7, 2017 reply Follow flag I think it is true for RISC architectures, where we have single word instructions. 1 1 replyShare Chhotu commented Dec 7, 2017 reply Follow flag I think it is true for RISC architectures, where we have single word instructions. @Rishabh Gupta 2 Any good reference ? 0 0 replyShare Please log in or register to add a comment.
0 0 votes you are saying PC contains starting address of the instruction but PC contains starting address of the program then immediately points to the next instruction..here the PC step size depends on the word length of the processor so whatever will be the step size processor,it will be decided based on processor word size. Md Sabir Ali answered Dec 7, 2017 Md Sabir Ali comment Share Follow 0 reply Please log in or register to add a comment.