(n-1)

what's the given answer ?

what's the given answer ?

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+4 votes

Best answer

If LSB also uses FULL Adder,(we can use Half Adder for LSB because we don't need carry-in).

For the first carry out, there will be 3 GATE DELAY: 1 AND, 1 EX-OR, 1 OR

For the next (n-1) bit , only 2 Gate Delay will be considered: 1 OR and 1 AND because EX-OR Operation will happen at parallel.

So total gate delay will be = 2*(n-1) + 3 = 2n+1 Gate Delay

For the first carry out, there will be 3 GATE DELAY: 1 AND, 1 EX-OR, 1 OR

For the next (n-1) bit , only 2 Gate Delay will be considered: 1 OR and 1 AND because EX-OR Operation will happen at parallel.

So total gate delay will be = 2*(n-1) + 3 = 2n+1 Gate Delay

+1

I considered XOR Gate as 1 Gate Delay, if we consider 2 Gate Delay for XOR GATE, in that case it'll be 2n+2.

the link you posted has considered 2 Gate Delay for XOR Gate

+3

https://nptel.ac.in/courses/117106114/Week9%20Slides/9.3Adder.pdf

in this pdf, they've considered NAND Gate implementation, it should help you with the idea.

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