If LSB also uses FULL Adder,(we can use Half Adder for LSB because we don't need carry-in).
For the first carry out, there will be 3 GATE DELAY: 1 AND, 1 EX-OR, 1 OR
For the next (n-1) bit , only 2 Gate Delay will be considered: 1 OR and 1 AND because EX-OR Operation will happen at parallel.
So total gate delay will be = 2*(n-1) + 3 = 2n+1 Gate Delay
