self-doubt

Question

can anyone explain how TLB is organized when it is used as Direct mapped and set-assosiative  or suggest any resource to read ?

https://gateoverflow.in/1840/gate2006-62-isro2016-50

Answer 1

the concept of TLB directed , set associative is same a cache direct mapping or  set associative mapping

the only difference is 

"TLB is about ‘speeding up address translation for Virtual memory’ so that page-table needn’t to be accessed for every address"

and

" CPU Cache is about ‘speeding up main memory access latency’ so that RAM isn’t accessed always by CPU"

 1) Direct mapping

 

 

2) Set Associative

 

 

 

Comments

just see the organization of cache from any standard book ....In case of TLB it's same as the Cache organization only differ is TLB store the address of the physical address and cache store the "block / frame " of the main memory