Computer Organization and architecture

Question

 Consider a hypothetical processor which supports expand opcode technique. A 32

bit instruction is place in 256MW memory. If there exist 10, one address instruction

then how many zero-address instruction are possible.

Answer 1

Instruction size = $32$ $bit$

Address size = $\log 2^{28}$ = $28$ $bit$

Total number of zero address instruction = $2^{32}$ – $10*2^{28}$ = $2^{28}(2^{4} - 10)$ = $6*2^{28}$