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I have a 3 bit shift register SISO (serial in and serial out) I took 3 CLK (clock) pulse to insert 1 0 1 and now I need to retrive them serially How may CLK pulse I would need ?.

I went online and check most of the answers says that for SISO shift registers its takes N-1 CLK pulses but there is no explanation given. Can some one explain me why .

Thanks

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For a 3 bit Shift Register SISO, you have stored 101 which took 3 clock pulses. Now the register looks something like this.

Now to read the 101 it will only take 2 clock pluse, because at this moment we are able to read the least significant bit 1(which is present in Sout). The following will we the condition after each clock pulse. (Note : in order to read the bit we will input 0 from Sin)

To Generalize : Since after storing the bits in a n-bit Shift Register with Serial Out, we always have a bit which is present in Sout, we are able to read. Thus, we only need n-1 clock pulses to read the complete stored bit.

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