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GATE CSE 2026 | Set 1 | COA | Memory Based | Question 47

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Which of the following dependencies among the register operands of different instructions can cause data hazards in a pipeline processor?

  1. WAW (Write After Write)
     
  2. RAR (Read After Read)
     
  3. RAW (Read After Write)
     
  4. WAR (Write After Read)

2 Answers

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In a pipelined processor, data hazards occur when the pipeline must be stalled because instructions that are overlapping in execution need to access the same data (registers or memory) in an order that differs from the original sequential program order. option c

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C

they are only true dependencies that cause hazards

In others there are no hazards, they are only data dependencies that can be avoided using Register Renaming.
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