Test by Bikram | Computer Organization and Architecture | Test 1 | Question: 12

Question

A computer uses a small direct-mapped cache between the main memory and the processor. The cache has four $16$-bit words (the data field), and each word has an associated $13$-bit tag field. When a miss occurs during a read operation, the requested word is read from the main memory and sent to the processor. At the same time, it is copied into the cache, and its block number is stored in the associated tag.

Consider the following loop in a program where all instructions and operands are $16$ bits long:

$$ \begin{array}{|c|c|c|} \hline \text{LOOP} & \text{Add} & \text{(RI)+, RO} \\ \hline & \text{Decrement} & R2 \\ \hline & \text{BNE} & \text{LOOP} \\ \hline \end{array}$$

Main memory contents:

$$ \begin{array}{|c|c|c|} \hline \text{Address} & \text{Data} \\ \hline \text{054E} & \text{A03C} \\ \hline & \text{05D9} \\ \hline & \text{10D7}\\ \hline \end{array}$$

Assume that before this loop is entered, registers $R0,  Rl$, and $R2$ contain $0, 054E$ and $3$, respectively. Also assume that the main memory contains the data shown in the above diagram of Main memory contents, where all entries are given in hexadecimal notation. The loop starts at location $\text{LOOP }= 02EC$. 

What is the number of Main memory access at the end of the First pass through the loop?

• A. $3$
• B. $4$
• C. $6$
• D. $8$

Answer 1

In the first pass there are 3 instructions and one data access. So, totally 4 memory accesses (each of 16 bits)

Add                (Rl)+,  RO
$$ \begin{array}{|c|c|c|} \hline \text{Add} & \text{(RI)+ , RO} \\ \hline \end{array}$$
This means, Content of memory location given in R1 is added to R0, and then R1 is incremented (to point to next location).

Comments

@Arjun sir, 

@Bikram Sir, please Explain.... 

In the first pass there are 3 instructions and one data access. So, totally 4 memory accesses 

for 3 instruction we are accessing 3 times memory but where we are accessing memory??

since we are accessing data of registers only..

And What is the meaning of instruction BNE ???

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Sir,

please elaborate the solution

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In the rst pass through the loop, the Add instruction is stored at address 4 in the cache, and its operand (A03C) at address 6. Then the operand is overwritten by the Decrement instruction. The BNE instruction is stored at address 0. In the second pass, the value 05D9 overwrites the BNE instruction, then BNE is read from the main memory and again stored in location 0.

 

The contents of the cache, the number of words read from the main memory and from the cache, and the execution time for each pass are as shown below.The contents of the cache, the number of words read from the main memory and from the cache, and the execution time for each pass are as shown below.

After pass No.     Cache contents           MM accesses            Cache accesses                  Time

1                          005E   BNE                         4                           0                                   40 τ

                            005D    Add               

                            005D   Dec

 

hence number of main memory access after end of first pass through loop is 4

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@ Shubhanshu

What is the meaning of instruction BNE ???

Branch if Not Equal ..  

https://www.c64-wiki.com/wiki/BNE