retagged by
637 views
0 0 votes

The memory unit of a computer has $256$ K words of $32$ bits each. The computer has an instruction format with four fields: an operation code field, a mode field (to specify one of seven addressing modes), a register address field (to specify one of $60$ processor registers), and a memory address.

What are the number of bits, in each of the below given fields, when the instruction is $one$ memory word long?

  1. Op-code
  2. Mode
  3. Register address
  4. Memory address 

 

  1. $6,5,3,18$
  2. $5,6,3,18$
  3. $5,18,6,3$
  4. $5,3,6,18$

1 Answer

Best answer
2 2 votes
  1.  Op-code => 32 - ( 3 + 6 + 18 ) = 5  bits
  2.  Mode => we need to identify 1 of 7 addressing modes so 23 = 8 hence 3 bits are required .
  3. Register Address => 60 registers implies 26 = 64 so 6 bits
  4. Memory Address => 256 K = 28 * 210  = 218  means 18 bits 

Hence option D , 5,3,6,18 .

selected by
Answer:
Position:
Show:

Related questions

2 2 votes
3 answers 3 answers
1.1k
1.1k views
Bikram asked Nov 25, 2016
1,098 views
Consider a hypothetical processor that supports two addresses one address and zero address instructions. It has a $256$ word memory, and a $20$ bit instruction is place...
4 4 votes
3 answers 3 answers
1.6k
1.6k views
Bikram asked Nov 25, 2016
1,568 views
A computer has $32$ bit instructions and $12$ bit addresses.If there are $250$ two-address instructions, the number of one-address instructions that can be formulated are...
1 1 vote
3 answers 3 answers
893
893 views
Bikram asked Nov 25, 2016
893 views
Consider the following program segment for a CPU having three Registers $R1, R2,$ and $R3$:$$ \begin{array}{|l|l|l|} \hline \text{Instruction} & \text{Operation} & \text{...
1 1 vote
1 answers 1 answer
937
937 views
Bikram asked Nov 25, 2016
937 views
A CPU has a $32$ KB direct-mapped cache with $128$byte block size. $’A’$ is a two dimensional array of size $512 \times 512$ with elements that occupy $8$bytes each.for (...