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42 42 votes

In a system with $\text{32 bit}$ virtual addresses and $\text{1 KB}$ page size, use of one-level page tables for virtual to physical address translation is not practical because of 

  1. the large amount of internal fragmentation
  2. the large amount of external fragmentation
  3. the large memory overhead in maintaining page tables
  4. the large computation overhead in the translation process

7 Answers

Best answer
58 58 votes
  1. Internal fragmentation exists only in the last level of paging.
  2. There is no External fragmentation in the paging.
  3. $\frac{2^{32}}{2^{10}} = 2^{22} =4M$ entries in the page table which is very large. (Answer)
  4. Not much relevant.
• edited by
9 9 votes
Ans is c Large memory overhead would there.To reduce it  use multi level paging will be used.
8 8 votes
i think the answer is c . The option is definitely going to rule out by the point that we do paging to reduce or totally remove internal fragmentation. that why we keep page size =frame size . here we even dont care how much big the page is . we are very sure that its going to fit in one frame . can anybody just explain how and where internal fragmentation is there .

now the option c.we do multilevel paging because we always want to get the whole page table in one page . and that why we do multilevel paging till that level while we get the whole page table in one page . here the memory size not given so we may not even now whether we need multilevel or not . still seeing that the number of page is high answer c is the best shot .
0 0 votes

The correct answer is C. the large memory overhead in maintaining page tables.


 

Let's break down the math to see why the memory overhead is the critical problem.

 

1. Deconstruct the Virtual Address

 

A virtual address is split into two parts: a page number (which acts as an index into the page table) and an offset (which tells us where the data is within that page).

  • Virtual Address Size: 32 bits

  • Page Size: 1 KB = $2^{10}$ bytes

To find the number of bits needed for the offset, we take the log base 2 of the page size:

  • Offset Bits: $\log_2(2^{10}) = 10$ bits

The remaining bits are used for the page number:

  • Page Number Bits: 32 (total bits) - 10 (offset bits) = 22 bits

 

2. Calculate the Number of Page Table Entries

 

The number of page table entries is determined by the number of possible virtual pages a process can have. This is $2$ raised to the power of the page number bits.

  • Number of Entries: $2^{22} = 4,194,304$ entries

This means that for every single process, the operating system would need to create a page table with over 4 million entries.

 

3. Calculate the Total Page Table Size

 

Each entry in the page table (Page Table Entry or PTE) needs to store the physical frame number and some control bits. A typical PTE size is 4 bytes.

  • Size of one PTE: 4 bytes

  • Total Page Table Size per Process: Number of Entries × Size of one PTE

    • $2^{22}$ entries × 4 bytes/entry = $4,194,304 \times 4$ bytes = $16,777,216$ bytes

    • 16 MB

 

Conclusion

 

A single-level page table would require the system to allocate 16 MB of contiguous physical memory for every single process. Even if a program is tiny (like a simple "Hello, World!"), it would still need this massive 16 MB table. This is an enormous and impractical memory overhead, which is why multi-level paging was invented to solve this exact problem.

–4 –4 votes
Option a is right but option c should als be right as huge no of pages will make managing page tables an overhead.
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