Write through vs Write back cache

Question

• Consider the following statements
  S1 : The number of lines contained in a set associative cache can be calculated from the number of bits in the memory address, the number of bits assigned to the tag, the number of bits assigned to the word id (identifying the number of words per block), and the number of bits assigned to the set id (identifying the number of sets.)
  S2 : Write through cache write mechanism creates more bus traffic compared to Write back
  Which of the following statements is/are true?
  1.   S1
  2.   S2
  3.   Both S1 and S2
  4.   None of the above

Comments

I think only s2.

 S1) we also require the no of blocks per set i.e k -way

S2) Write through will create more bus traffic because both the ram and cache will be updated for cache write.

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what was the answer?

Answer 1

S1:False because the number of bits in the memory address, the number of bits assigned to the tag, the number
of bits assigned to the word id, and the number of bits assigned to the set id can only tell you how many sets
there are. You need to know the number of lines per set in order to calculate the number of lines.

S2: True Write through will create more bus traffic because it will simultaneously update both Cache and Ram.You can imagine a situation where a huge amount of memory references are made and then CPU will be busy in just updating them through System and Data Bus.

Comments

Yes first option is false as as associativity needs to be mentioned