After converting this expression to three address code we get:
t1=b+c
t2=t1/3
t3=t2+d
t4=a-1
t5=t3*t4
Now after doing liveness analysis of each and every statement we get:
Live(statement1)={a,b,c,d}
Live(statement 2)={a,d,t1}
Live(statement 3)={a,d,t2}
Live(statement 4)={t3,a}
Live(statement 5)={t3,t4}
Register allocation:
r1<-b (Allocate r1 to b)
r2<-c (Allocate r2 to c)
Since outlive of first statement is {a,d,t1}, so we can allocate any of the registers r1 or r2 to t1. Let's allocate r1 to t1.
r1<-r1+r2
Outlive (statement 2)={a,d,t2} , so we either can allocate r2 to t2 or put the result back in r1 after doing the division.
r2<-r1/3
Outlive(statement 3)={t3,a} and t2 is being used in this statement, so we can first allocate r1 to d and then finally allocate r1 to t3.
r1<-r2+r1
Outlive(statement 4)={t3,t4}, so first allocate r2 to a and put the final result back in r2
r2<-r2-1
Finally we can put the final result in either r1 or r2 after doing the multiplication. So minimum no of registers needed=2