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It requires (2n-1) half adders and (n-1) 2 input  OR gates

for example: for 16 bit binary (parallel) adders we require 16 Full Adders to implement

                     that implies we need  n Full adders,

                     else 1 Half Adder , 15 Full Adders  -> 1 HA,(n-1) FA

                     else  31 HA, 0 FA -> (2n-1) HA

                  for first HA we don't require  any OR gate and for the rest of the half adders we need (n-1) OR gates.

finally we need (2n-1) half adders and (n-1) OR gates
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Half Adder circuit : 

Full Adder circuit :

i.e, we can construct one full adder with 2 half adders and 1 OR gate.

For example if we add two 4-bit numbers A(a3,a2,a1,a0), B(b3,b2,b1,b0), we require 1 half adder(a0+b0) and 3 full adders(a1+b1+carry0, a2+b2+carry1,a3+b3+carry2).

Each full adder take 2 half adders and 1 OR gate.

i.e, 3 full adders take = 3*2 half adders + 3*1 OR gate.

Total for 4 bit addition it will take 7(6+1) half adders + 3 OR gates.

Generalization for n-bits addition:

It will take 1 half adder and (n-1) full adders .

These (n-1) full adders we can represent with (n-1)*2 half adders + (n-1)*1 OR gate.

So,total for n-bits addition it will take 2n-1(2n-2+1) half adders and (n-1) OR gates.

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