search
Log In
2 votes
101 views

in Digital Logic
edited by
101 views

1 Answer

0 votes
C'D'+CD'=D'

C'D'+CD=D

A'B'D'+ABD this is answer

So d. None of these

Related questions

1 vote
1 answer
1
155 views
Q. The minimum number of $2$-input $NAND$ gates required to implement the function $F = (x' + y')(z + w)$ is $?$ plz explain?? and also i realized but I am getting always correct answer plz suggest how to approach???
asked Oct 5, 2016 in Digital Logic Hradesh patel 155 views
2 votes
0 answers
2
192 views
In a $4-$bit carry look ahead adder, the propagation delay of EX-OR gate is $20ns,$ AND and OR gates is $10ns.$ The sum and carry output of full adder takes $20ns$ and $10ns$ respectively. The total propagation delay of the above adder in $ns$ is
asked Oct 5, 2016 in Digital Logic Hradesh patel 192 views
0 votes
0 answers
3
405 views
A 2-to-1 multiplexer having a switching delay of 1 μs is connected as shown in the figure. The output of the multiplexer is tied to its own select input S. The input which gets selected when S = 0 is tied to 1 and the input that gets selected when S= 1 is tied to 0. The output V0 will be 0 1 Pulse train of frequency 0.5 Mhz Pulse train of frequency 1.0 Mhz
asked Jan 4, 2019 in Digital Logic Sambhrant Maurya 405 views
1 vote
0 answers
4
...