In a paging-based memory management system, the page table for a process contains the physical addresses of the pages in that process’ address space. Consider a memory management system on a machine with a 32-bit address bus that uses a page/frame size of 2 Kbytes. Assume that each page table entry is 4 bytes long. How many bits are available for storing additional information about a page (besides the physical address of the corresponding frame) in each page table entry?