MadeEasy Test Series: CO & Architecture - Cache Memory

Question

Consider a memory access to main memory on a cache miss takes 100 ns and memory access to cache at cache hit takes 10 ns. If 75% processors memory request results in cache hit the average memory access time is _____ ns.

Comments

32.5 ???

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even i did 35 for this!!

whats the correct answer?

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nice one

Answer 1

Mm access time after cache miss is 100 ns so it has included total time .. for cache miss and mm access 

Comments

how are you interpreting this? 100ns is time for both  (cache miss + mm access)

a memory access to main memory on a cache miss takes 100 ns

it clearly mentions memory access to main memory on cache miss

 

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on "cache miss" indicate that only ...

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why they mentioned ..ON CACHE MISS ..?

they can also be write that mm access time is 100 ns ..but they have written it as ON CACHE MISS ..

so we should consider it as cache miss + mm access

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main memory is only accessed when there is a cache miss. if a question says "main memory access time is 100ns" then meaning is same because it is obvious that without cache miss why main memory will be accessed. 

but according to you if my question "main memory access time is 100ns",100ns will include both cache time and main memory time. 

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I feel the language is not at all clear  :/

Answer 2

given the main memory access time when the cache miss is =100ns

cache access time=10ns

and hit  rate is =75%=0.75

there are 2 ways to find out memory access time

case1 : both cache and memory accessed simultaneously

then  avg memory access time= (hit rate*cache access time)+(miss rate*main memory access time)

                                        =(0.75*10)+((1-0.75)*100)=32.5ns

 

case 2: both cache and memory accessed serially

then  avg memory access time=(hit rate*cache access time)+(miss rate*(cache access time+main memory access time)

                                              =(0.75*10)+(0.25*(10+100))

                                             =35ns