1,756 views
0 0 votes

in this question how we can know set associativity.

Consider two cache organizations. The first one if 64 KB way associative with 64 byte block size. The second one is of the 64 KB direct mapped cache. The size of an address is 32 bits in both organizations. A 4 to 1 multiplexer has latency of 0.8 ns which k bit comparator has latency of k/5 nsec. The difference between the hit latencies of both cache organizations (i.e. associative hit latency – direct mapped hit latency) (in nsec) is ___________.

2 Answers

Best answer
0 0 votes

as per given 4:1 mux,if we consider it is 4 way associative then answer  is 1.2 ns.

• selected by
1 1 vote
There will be something n way  set associative,else we can't determine set offset.The qs seems wrong..
Position:
Show:

Related questions

1 1 vote
0 0 answers
1.7k
1.7k views
Raj Singh 1 asked Dec 18, 2018
1,700 views
Given the following specifications for an external cache memory: four-way set associative; line size of two 16-bit words; able to accommodate a total of 4K 32-bit words f...
0 0 votes
0 0 answers
1.8k
1.8k views
Mk Utkarsh asked Sep 12, 2018
1,789 views
Consider a 4 - way set associative cache with 'L' blocks of 16 words each. Cache block is associated with dirty bit field and valid bit field. Calculate cache capacity wi...
0 0 votes
0 0 answers
485
485 views
Na462 asked Nov 9, 2017
485 views
Plz Anyone Clear my doubt:In this Question :- https://gateoverflow.in/43490/gate2008-72As 0xFF000 is the start address and its a set associative so 11bits represent the s...