0 0 votes Can anyone please solve this? CO & Architecture testbook-test-series co-and-architecture cache-memory + – Shoto 952 views answer comment Share Follow Print See all 3 Comments 3 3 Comments reply palashbehra5 commented Jan 14, 2022 reply Follow flag block size 32B, therefore 5 bits for offset. Total blocks = 256KB / 32B = 2^13, 13 bits for indexing. Logical address space <tag bits, index bits, offset bits> LAS size = 32 <tag bits, 13 , 5>, tag bits = 14. 14+1+1+1 = 17bits required per entry as meta data. Total memory for meta data: 17 * 2^13 bits or 17*2^10 B or 17KB. 1 1 replyShare Shoto commented Jan 14, 2022 reply Follow flag @palashbehra5 Ohh silly mistake I forgot to convert bits into bytes :( 0 0 replyShare palashbehra5 commented Jan 14, 2022 reply Follow flag B R U H! 0 0 replyShare Please log in or register to add a comment.
2 2 votes Cache size=256KB= 2^18 Block size=32 KB=2^5 Number of blocks=(2^18)/(2^5)=2^13 blocks 14 bit(Tag) 13bit(index) 5 bit(Offset) Total entry=14+1+1+=17bit Total size of tag memory=17bit*2^13=136Kb=136/8=17KB amitraj123 answered Jan 15, 2022 amitraj123 comment Share Follow 0 reply Please log in or register to add a comment.