GATE CSE 2026 | Set 2 | Question: 46

Question

Consider a system with $1$ MB physical memory and a word length of $1$ byte. The system uses a direct mapped cache, with block numbers starting from $0$. The word with physical address $\text{0xA2C28}$ is mapped to the cache block number $176_{10} $. The maximum possible size of the cache (in KB ) for this configuration is $\_\_\_\_\_\_\_$. (answer in integer)

Note: $1 \mathrm{~K}=2^{10}$ and $1 \mathrm{M}=2^{20}$

Comments

What a beautiful question! If someone could solve this question, he/she really has a good understand of direct mapping cache memory.

Answer 1

Answer : (128)

Comments

Wao brother dil kush kr diya ans ne...💕max word ko miss kr rha tha mai

Answer 2

$$(176)_{10} \rightarrow \overbrace{(10110000)}^{\text{8 bit representation of 176}}$$

$$\text{0x A2C28} \rightarrow (1010\ 00\boxed{10\ 1100\ 00}10\ 1000)_2$$

$$\downarrow$$

$$\text{Representation of 176 in binary.}$$

But here we have been told to find max possible size of cache, so we have to take as much big possible no. of bits in Index.

We know that if we stuff zero's in front of a binary then the value doesn't change.

$$\text{0x A2C28} \rightarrow (101\boxed{0\ 0010\ 1100\ 00}10\ 1000)_2$$

$$\underbrace{101}_{3\text{ bit}}\ \underbrace{00101100\ 00}_{11\text{ bit}}\ \underbrace{101000}_{6\text{ bit}}$$

$$\text{(This value is also 176)}$$

$$\begin{array}{|c|c|c|}
\hline
\text{Tag} & \text{Index} & \text{Offset} \\
\hline
3\text{ bit} & 11\text{ bit} & 6\text{ bit} \\
\hline
\end{array}$$

$$\therefore \text{Cache size} = 2^{11} \times 2^{6}$$

$$= 2^{17}$$

$$= 128\ \text{KB (Ans)}$$

Comments

But here we have been told to find max possible size of cache, so we have to take as much big possible no. of bits in Index....everyone know it , but at that Q solving time I didn't consider that...thnx buddy...

Answer 3

HERE IS THE SIMPLE AND DETAILS EXPLANATION 

Answer 4

0xA2C28 expands to 1010 0010 1100 0010 1000 in binary and (176) base 10 expands to 10110000 in binary.

 

Since, size of physical memoery is given as 1 MB i.e. 2^20 B. therefore, the Physical address will comprise of 20 Bits.

Now, 20 bits will be distributed between Tag, Cache Index and Byte Offset.

Binary of 176 is a 8 bit number which fits exactly into 101000 10110000 101000. Therefore, 20 bit number translates to :

Tag = 6 bits, Index = 8 Bits, Offset = 6 Bits.

Block size = 2^6 = 64 Bytes

Cache index = 2^8 = 256

Therefore, Max Cache Size = 2^6 * 2^8 = 2^14 Bytes or 2^4 KB = 16 KB

 

Answer 5

please acknowledge me whether i am correct or not. 

Answer 6

THE MAIN REASON FOR MAXIMIZATION AND HOW AND WHY WE DID IT?

 

To maximize the total size of the cache, we must maximize the number of blocks it contains. The number of blocks is determined by the number of bits allocated to the Index ($2^n$ blocks, where $n$ is the number of index bits). Therefore, we need to make the index as wide as possible without changing its decimal value.

 

Here is the exact breakdown of why we can add exactly three bits to the index:

 

• The Hard Constraint: The problem states the address maps specifically to cache block number 176. In binary, 176 is 10110000. This requires a minimum of 8 bits.

• The Binary Address: Let's look at the full 20-bit physical address for 0xA2C28, with bit positions numbered from 19 down to 0:

  
  Plaintext

  Bit Position: 19 18 17  16 15 14  13 12 11 10  9  8  7  6   5  4  3  2  1  0
  Binary Value:  1  0  1   0  0  0   1  0  1  1  0  0  0  0   1  0  1  0  0  0
  

• Locating the Base Index: The sequence 10110000 perfectly aligns from Bit 13 down to Bit 6. If we use exactly these 8 bits for the index, the value is exactly 176.

• The Leading Zero Rule: In binary, just like in standard decimal numbers, adding leading zeros to the left of a number does not change its total value (e.g., $0176$ is still $176$). To make the index larger in bit-width (to get more total cache blocks) without changing its mathematical value (it must stay 176), we can expand the index window to the left, but only as long as we are absorbing 0 bits.

• Expanding the Index:

   

  • +1 Bit (9 bits total): Absorb Bit 14 (0). The index is 0 10110000, which is still 176.

  • +2 Bits (10 bits total): Absorb Bit 15 (0). The index is 00 10110000, which is still 176.

  • +3 Bits (11 bits total): Absorb Bit 16 (0). The index is 000 10110000, which is still 176.

• The Stopping Point: If we try to expand one more position to the left to absorb Bit 17, we hit a 1.

   

  • A 12-bit index starting at Bit 17 would be 1000 10110000.

  • The decimal value of 100010110000 is 2224.

  • This violates the strict rule that the address must map to block 176.

Because the fourth bit to the left is a 1, we are forced to stop expanding. We can only safely absorb the three adjacent 0 bits, giving us a maximum index size of 11 bits. This allows for $2^{11}$ (2048) total cache blocks, yielding the maximum possible cache size of 128 KB.