Register

ISRO CSE 2011 | Question: 80

4,295 views

2 Answers

2 2 votes

ans is (a)

The power dissipation is dependent on the power supply voltage, frequency, output load, and input rise time. At 1 MHz and 50 pF load, the power dissipation is typically 10 nW per gate.

Voting & Accepting an answer helps improve the community
Answer:
← Previous · ISRO CSE 2011 | Ques...Next → · 3NF
← Previous in category · ISRO CSE 2008 | Ques...Next in category → · ISRO CSE 2014 | Ques...
Position:
Show:

Related questions

4 4 votes
1 answers 1 answer
4.0k
4.0k views
go_editor asked Jul 1, 2016
4,004 views
ISRO CSE 2014 | Question: 46
If the maximum output voltage of a DAC is $V$ volts and if the resolution is $R$ bits then the weight of the most significant bit is ________$V/(2^R -1)$$(2^{R-1}).V/(2^R...
4 4 votes
3 answers 3 answers
3.4k
3.4k views
go_editor asked Jun 12, 2016
3,447 views
ISRO CSE 2008 | Question: 21
The advantage of MOS devices over bipolar devices is thatit allows higher bit densities and also cost effectiveit is easy to fabricateit is higher-impedance and operation...
5 5 votes
1 answers 1 answer
4.2k
4.2k views
go_editor asked Jun 10, 2016
4,249 views
ISRO CSE 2007 | Question: 35
The output $0$ and $1$ level for TTL Logic family is approximately$0.1$ and $5 \text{ V}$$0.6$ and $3.5 \text{ V}$$0.9$ and $1.75 \text{ V}$$-1.75$ and $0.9 \text{ V}$
2 2 votes
0 0 answers
913
913 views
Misbah Ghaya asked Nov 7, 2016
913 views
GATE CSE 1987 | Question: 1-I
The most satisfactory LED driver circuit using a TTL gate is: