I think it should be if A=1, the third NAND gate gives "1" and F=1. instead of 0.

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+3 votes

Hi to all,

Very challenging question is as follows:

For Function F of the following which option is TRUE?

I) if B=C=D=1, for any change in value A there can be static hazard 1.

II) if B=C=D=1, for any change in value A there can be static hazard 0.

III) ) if B=C=D=1, just for change value A from zero to one, there can be static hazard 0.

IV) ) if B=C=D=1, just for change value A from one to zero, there can be static hazard 1.

Is there any expert on GATE exams, DIGITAL LOGIC section to help us?

I found similar question on http://electronics.stackexchange.com/questions/222382/static-hazard-in-specific-value-or-any-changes our challenge is that anyone please say why these answer disagree with this answer? thanks

+4 votes

A NAND gate produces output 1 when one of its input is a 0. So, for $F$ to be one, one of its input should be 0, which inturn means all the inputs of any one of the first level NAND gates be 1's.

When $B=C=D=1$, the second NAND gate gives output $1\;($since one input $\bar B$ is $0)$ and hence won't affect the final output $F$ if $A$ changes.

If $A=1$, the third NAND gate gives output $0$ and $F = 1$.

If $A = 0$, first NAND gate gives output $1$ and final output is $F=1$. But if the propagation delay of the first gate is more- considering an extra NOT gate for $\bar A$, output could have been $F=0$ for a moment- static 1 hazard and this happened when A changed from 1 to 0. A similar hazard can happen when A changes from 0 to 1, but only if the third gate is having higher propagation delay compared to first.

When $B=C=D=1$, the second NAND gate gives output $1\;($since one input $\bar B$ is $0)$ and hence won't affect the final output $F$ if $A$ changes.

If $A=1$, the third NAND gate gives output $0$ and $F = 1$.

If $A = 0$, first NAND gate gives output $1$ and final output is $F=1$. But if the propagation delay of the first gate is more- considering an extra NOT gate for $\bar A$, output could have been $F=0$ for a moment- static 1 hazard and this happened when A changed from 1 to 0. A similar hazard can happen when A changes from 0 to 1, but only if the third gate is having higher propagation delay compared to first.

+2 votes

ANSWER: OPTION A

Here, used 3 inputs and 2 inputs NAND gates and NAND gate property is , if any 1(atleast 1) input is 0 then output must be 1.

So, for any value of A , output will be or F value will be 1(Because there is both form of A , so if A=1 , then A'=0 else if A=0 then A'=1).

please check

0

what details?

NAND gate truth table

A B (A.B)'

0 0 1

0 1 1

1 0 1

1 1 0

what you don't understand , please check and ask properly

0

with this property "if any 1(atleast 1) input is 0 then output must be 1." you determine the option A is true?

0

see it is a NAND gate property . i also post a truth table of NAND gate . you can see , in first 3 inputs value is 0 and the output is 1 or

you can understand in other manners, like if all inputs are 1's then only output becomes 0.

hopefully now u understand

you can understand in other manners, like if all inputs are 1's then only output becomes 0.

hopefully now u understand

0

I found similar question on http://electronics.stackexchange.com/questions/222382/static-hazard-in-specific-value-or-any-changes would you please say why these answer disagree with your answer? thanks

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