level cache

Question

Suppose that a CPU has access to 3 levels of memory. 

L1 = 2000 words and access time = 0.02 ms and H1 = 0.65

L2 = 10000 words and access time = 0.2 ms and H2 = 0.45

L3 = 20000 words and access time = 2 ms

Assume that if a Word to be accessed is in L1, then it can be accessed directly. If it is in L2, first transfer it to L1 and then send to CPU. Similarly, for L3 . What is the average access time in % ?

Comments

i am getting 0.475 msec ?

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please upload the QS clearly..either take proper screen shot ..or type ...

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@Kunal. How do you know that the word isn't in the L1 memory?  So, 0.475 is wrong.

It should be 0.520

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Suppose that a processor has access to three levels of memory. Level 1 contain 2000 words and has an access time of 0.02 msec. Level 2 contain 10,000 words and has an access time of 0.2 msec. Level 3 contains 20,000 words and has an access time of 2 msec. Assume that if a word to be accessed is in level 1, then processor access it directly. If it is in level 2 the word is first transferred to L1 and then accessed by the processor. Similarly for L3 the word is transferred to L2then to L1 and then accessed. The hit ratio for level 1 is 0.65 and for level 2 is 0.45. The average access time (in μsec) is ________.

 

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I don't think any use of 2000,10000,20,000 words

Answer 1

Question says definition of hierarchical access;

Average access time = L1_hit (L1 access time) + (1- L1_hit ) L2_hit (L1 access time + L2 access time + L1 access time) + (1- L1_hit ) (1- L2_hit) (L1 access time + L2 access time + L3 access time +L2 access time + L1 access time)

                                = 0.65 (0.02) + (0.35)(0.45) ( 0.02 + 0.2 + 0.02) + (0.35)(0.55) ( 0.02 + 0.2 + 2 +0.2 + 0.02 )

                                = 0.013 + 0.0378 + 0.4697

                               = 0.5205

What question may ask:

1.Check in L1 if present then read . read time of L1

2. if not present in L1 but in L2 :   i.e. read time of L1 to check not present + read from L2 + Transfer to L1 and access

3.  if not present in L1 and L2 but in L3 :   i.e. read time of L1 to check not present + read time of L2 to check not present + read time of L3 + Transfer to L3 to L2 + Transfer to L2 to L1 and access 

Note : In General miss penality is given which include transfer time to lower level and read time to processor (100 times or higher than normal aceess)

Comments

@Arjun @Kapil @Debashish.

Have a look at all the 3 topics in the left pane of https://www.d.umn.edu/~gshute/arch/cache-performance.xhtml

They define cache miss penalty as difference the lower level access time and cache access time.

i.e.  cache miss penalty = lower level access time - cache access time ................................(1)

Now, usually we have:

effective cache access time

= cache hit rate * (cache access time)

   + (1 - cache hit rate) * (cache access time + effective lower level access time)

= cache access time + (cache miss rate)* (effective lower level access time)

Now, compare this with the following equation from the above link:

effective-access-time = cache-access-time + miss-rate * miss-penalty

So, ideally speaking,

miss penalty = effective lower level access time ................(2)

Now, from (1), we have

cache miss penalty = lower level access time - cache access time

But, lower level access time >> cache access time

Thus, cache miss penalty = lower level access time

This is what Hamacher defines. They have suitably ignored the components that dont affect the answer in a greater way.

Again, I think, our intuition would suggest us to go with equation (2) which is ideally correct. But, for exam purpose, we must follow the Hamacher definition.

Am I right?

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Other analogy to remember the formula for miss penalty  I can think of is this:

Currently, taxation in India is done at each level independently regardless of what tax you have paid at the previous level. New taxation scheme i.e GST is just single point taxation scheme.

Now, compare the old taxation scheme with miss penalty concept they have defined.

Here, miss penalty is just taxation at that level i.e. lower level access time. Here, you neednt consider that what would happen if there is again a miss at lower level.

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I have seen this definition. That's why I pointed out that Patterson && Hannessey definition few one month ago related to same issue.

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Hennessey and patterson

even Hamacher agree on same miss penalty def.

Answer 2

Lets find out the effective L2 access time.

L2 effective access time

=  (L2 hit rate)(L2 access time)

+ (L2 miss rate)(L2 access to conclude miss + L3 access + L2 access to newly loaded word)

= 0.45*(0.2) + (0.55)*(0.2 + 2 + 0.2)

= 1.41 ms

 

Lets find out the effective L1 access time.

L1 effective access time

=  (L1 hit rate)(L1 access time)

+ (L1 miss rate)(L1 access to conclude miss + L2 effective access time + L1 access to newly loaded word)

= 0.65(0.02) + 0.35(0.02 + 1.41 + 0.02)

= 0.5205 ms