• recategorized by
42,048 views
82 82 votes

A hard disk with a transfer rate of $10$ Mbytes/second is constantly transferring data to memory using DMA. The processor runs at $600$ MHz, and takes $300$ and $900$ clock cycles to initiate and complete DMA transfer respectively. If the size of the transfer is $20$ Kbytes, what is the percentage of processor time consumed for the transfer operation?

  1. $5.0 \%$
  2. $1.0\%$
  3. $0.5\%$
  4. $0.1\%$

11 Answers

Best answer
118 118 votes
Clock cycle time = $\frac{1}{600 \times 10^6}$   [ Frequency = 1/Time]

 For DMA initiation and completion = $\frac{(900+300)}{600\times10^6}  = 2$ microsec .

 Disk Transfer rate $= 10$ Mbytes/sec

 $1$ byte $= \frac{1}{10^7}$ sec

 $20$ Kbytes $= 2$ milisec $= 2000$ micro sec

  Percentage $= \left (\frac{2}{2+2000} \right )\times100    =0.0999 ≃ 0.1\%$

 option (D)

 
$\%$ of CPU time consumed $=\frac{x}{x+y}$

If $x$ is the Data preparation time or Total cycle time used by CPU and $y$ is the Data transfer time, to calculate the fraction of CPU time to the data transfer time -  we use $\frac{x}{x+y}$ in burst mode.
• edited by
18 18 votes

Clock cycle time = (1/600) x 10 ^6

 For DMA initiation and competion = (900+300)/(600 x 10 ^6) = 2 microsec .

Disk Transfer rate = 10 M bytes. 1 byte = 1/10^7 sec

20 K bytes = 2000 microsec Percentage = (2/2000)*100 =0.1%

so, ans D

.

10 10 votes
Data transfer time= initialization time + DMA transfer time =300+900=1200 cycles

Data preparation time = time disk is taking to transfer 20KB to DMA

                                   = (20KB)/(10MBps) = 2msec or 1200000 cycles

thus CPU time consumed = (transfer time)/(prepartion time + transfer time)

                                        = [1200/(1200000+1200)] * 100

                                        =0.0999 = 0.1%
9 9 votes
It is simple logical question. No need of so many calculations.
The answer is simply
 (20KB/10MB)x100
= (20KB/10x1024KB)x100
= 0.1%

The reason for this is whatever may be the processor speed and clock cycle . While taking percentage ratio they will get cancel led out.
9 9 votes

Processor Speed = 600MHZ = $6*10^{8}$ cycles/second

Transfer time =   $\frac{20KB}{10MB}$ = 2ms = $12*10^{5}$ cycles

Total cycles consumed = 1200,000 + 300 + 900 = 120,1200 cycles
% of processor time consumed =  $\frac{120,1200*100}{6*10^{8}} =  \frac{12012}{60000}$= 0.2%

So, (D) can be chosen as option!

• edited
2 flags:
✌ Edit necessary (Girish Chougule)
✌ Low quality (Navjeet singh saheb)
5 5 votes

Transfer rate=10 MB per second

Data=20 KB=20* 2 10

So Time=(20 * 2 10)/(10 * 2 20)= 2* 10-3 =2 ms

Processor speed= 600 MHz=600 Cycles/sec

Cycles required by CPU=300+900 =1200

For DMA=1200

So time=1200/(600 *10 6)=.002 ms

 In %=.002/2*100=.1%

So (D) is correct option

Answer:
Position:
Show:

Related questions

75 75 votes
4 answers 4 answers
24.4k
24.4k views
go_editor asked Sep 29, 2014
24,382 views
On a non-pipelined sequential processor, a program segment, which is the part of the interrupt service routine, is given to transfer $500$ bytes from an I/O device to mem...
80 80 votes
6 answers 6 answers
30.1k
30.1k views
go_editor asked Apr 24, 2016
30,101 views
Consider the following program segment for a hypothetical CPU having three user registers $R_1, R_2$ and $R_3.$$$ \begin{array}{|l|l|c|} \hline \text{Instruction} & \text...
54 54 votes
5 answers 5 answers
28.5k
28.5k views
Kathleen asked Sep 18, 2014
28,522 views
A 4-stage pipeline has the stage delays as $150$, $120$, $160$ and $140$ $nanoseconds$, respectively. Registers that are used between the stages have a delay of $5$ $nano...
51 51 votes
2 answers 2 answers
20.0k
20.0k views
Kathleen asked Sep 18, 2014
19,950 views
The microinstructions stored in the control memory of a processor have a width of $26$ bits. Each microinstruction is divided into three fields: a micro-operation field o...