Test by Bikram | Computer Organization and Architecture | Test 2 | Question: 30

Question

Consider a hypothetical processor that supports two address, one address and zero address instructions. It has a $256$ word memory, and a $20$ bit instruction is placed in $1$ word of memory (memory is word addressable). Given that there exist $8$ two address instructions and $1984$ one address instructions. The total number of zero address instructions formulated is ________ (put in integers only)

Answer 1

It is given , 20 bit instruction is placed in 1 word of memory .

And we have 256 word memory , 256 = 2⁸ so  8 bits for 1 address, 8 bits for 2 address and 20 - (8+8) =4 bits for opcode.

opcode = 4 bits 
 add1= 8 bits
 add2 = 8 bits

Given that there exist 8 two address instructions and 1984 one address instructions

with 20 bits , possible encoding is 2²⁰ .

No. of encoding for 2 address instructions = 8 *  2⁸ * 2⁸ = 2¹⁹   bcoz two 8-bit address fields .

No. of encoding for 1 address instructions = 1984 *  2⁸  bcoz one 8-bit address fields

So, number of possible 0-address instructions = 2²⁰ -  2¹⁹ - ( 1984 *  2⁸ )

= 524288 -  507904

= 16384

Now possible 0-address instructions  = 16384  .