retagged by
1,175 views
1 1 vote
How to approach hit latency problems in cache mapping techniques.

Please explain with an example.

Thank in advance.

Please log in or register to answer this question.

Position:
Show:

Related questions

22 22 votes
3 answers 3 answers
10.9k
10.9k views
pC asked Jul 27, 2016
10,944 views
Cache 1Direct Mapping 17 tag 10 block5 word Cache 2Set Assosicative 2- way associative 1895Cache 3Associative Cache 27 5 Calculate Hit Latenncy in Each of Three Cache...
4 4 votes
1 answers 1 answer
1.4k
1.4k views
mcjoshi asked Sep 23, 2016
1,407 views
In a cache organized memory there exist $30$% of compulsory misses, $10$% capacity misses, $12$% conflict misses. If cache is fully associative Find the average access ti...
0 0 votes
2 answers 2 answers
3.2k
3.2k views
Chandra Kishore asked Jun 5, 2016
3,156 views
A cache has a hit rate of 95 percent, 128-byte lines, and a cache hit latency of 5 ns. The main memory takes 100 ns to return the first word(32 bits) of a line, and 10 ns...
0 0 votes
0 0 answers
474
474 views
aashish1406 asked Aug 22, 2023
474 views
is this formula is correct if it is correct then in gate 2006 Question 75 why they not used this formulahttps://gateoverflow.in/43565/gate-cse-2006-question-75