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For a N-stage ripple carry counter which uses flipflops of propagation delay = P ns and clock period of C ns. Give the expression of the frequency of input signal?
in Digital Logic by Boss (10.7k points) | 309 views

in ripple counter, to work properly, Tclock is in prior adjusted as below given eqn

Tclock >= N*Tflip_flop

therefore entire input frequency will be frequency of input clock

therefore input frequency = $\frac{1}{C}$Ghz

So the following is incorrect. right?

$X = T_{clock} + N*T_{flipflop}$

$Input freq \leq  \frac{1}{X}   GHz$

In one of the madeeasy solutions this was given so I wanted to confirm.
yes, it is incorrect.

Check this diagram.


So according to your diagram for this eqn. to satisfy

Tclock >= N*Tflip_flop

N must be 1.

Am I understanding it correctly? I'm weak in these timing diagrams.


1 Answer

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Propagation delay for a Ripple counter is given by formula = 

Where Tpropagation−delay= 1/frequency(f)

where Strobe Signal's delay has to be treated as an additional Combinational crkt delay... 

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