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We consider the addition of two $2's$ complement numbers $ b_{n-1}b_{n-2}\dots b_{0}$ and $a_{n-1}a_{n-2}\dots a_{0}$. A binary adder for adding unsigned binary numbers is used to add  the two numbers. The sum is denoted by $ c_{n-1}c_{n-2}\dots c_{0}$ and the carry-out by $ c_{out}$. Which one of the following options correctly identifies the overflow condition?

  1. $ c_{out}\left ( \overline{a_{n-1}\oplus b_{n-1}} \right )$
  2. $ a_{n-1}b_{n-1}\overline{c_{n-1}}+\overline{a_{n-1}b_{n-1}}c_{n-1}$
  3. $ c_{out}\oplus c_{n-1}$
  4. $ a_{n-1}\oplus b_{n-1}\oplus c_{n-1}$
asked in Digital Logic by Loyal (4.3k points)
edited by | 1.7k views
can anyone please give me explanation for this question .
I guess here all options are incorrect.
is C1 C2... Cn-1 denote Sum ? I think it should represent carry

4 Answers

+22 votes
Best answer

Number representation in 2's complement representation:

  • Positive numbers as it is
  • Negative numbers in 2's complement form.

So, the overflow conditions are

  1. When we add two positive numbers (sign bit 0) and we get a sign bit 1
  2. When we add two negative numbers (sign bit 1) and we get sign bit 0
  3. Overflow is relevant only for signed numbers and we use carry for Unsigned numbers
  4. When the carry out bit and the carry in to the most significant bit differs

PS: When we add one positive and one negative number we won't get a carry. Also points 1 and 2 is leading to point 4.

Now the question is a bit tricky. It is actually asking the condition of overflow of signed numbers when we use an adder which is meant to work for unsigned numbers.

So, if we see the options, B is the correct one here as the first part takes care of case 2 (negative numbers) and the second part takes care of case 1 (positive numbers) - point 4.  We can see a counter example each for other options:

A - Let $n=4$ and we do $0111 + 0111 = 1110$. This overflows as in $2's$ complement representation we can store only up to 7. But the overflow condition in A returns false as $c_{out} = 0$.

C - This works for the above example. But fails for   $1001 + 0001 = 1010$ where there is no actual overflow (-7+1 = -6), but the given condition gives an overflow as $c_{out} =0$ and $c_{n-1} = 1$.

D - This works for both the above examples, but fails for $1111 + 1111 = 1110$ (-1 + -1 = -2) where there is no actual overflow but the given condition says so.

Ref: http://www.mhhe.com/engcs/electrical/hamacher/5e/graphics/ch02_025-102.pdf

Thanks @Dilpreet for the link and correction.

answered by Veteran (48.3k points)
edited by
it is given that numbers are unsigned ,so in that case i think answer should be A,

but if numbers are signed then option C is Correct.

 

@Digvijay and @Arjun sir correct me if i am wrong

Here, Cn - 1  is the MSB of result .

I m getting all options incorrect.

Yes, I guess its a typo in question. Ci should be carry at respective positions.

Sir in point 3) When we add two unsigned numbers and there is an out carry (from MSB position).

Now, see option D)1111+1111=1110 , isnot there a out carry?

Both are here unsigned numbers, So, why taking value of 1111 as -1. means then it will be signed bit.rt?

 

Point 3 was wrong. Here, we consider only signed numbers. I corrected it now.
I am also getting same answer i.e. A as explained by @parthak please correct me if I m wrong...!!!!!!11
For all the confused people who are saying A is the answer:

Read question again.  "We consider the addition of two 2′s complement numbers"

Lets take 7+7    0111  + 0111    (Assume our adder size is 4bits)
It should be +14. Right ?  
+14 is not   1110 in 4 bit 2's complement representation.   1110 means  -2.
So +14 cant be represented using 4bits in 2's complement representation.
So it is an overflow.

But apply option A, it says it is not an overflow.  (You are thinking it correct because you are thinking 0111+0111 = 1110 is fine with no overflow,  & that word unsigned is confusing you.  Question says...The numbers we have taken are 2 2's complement numbers.)

@Arjun sir @Digvijay

shouldn't the ans should be Bn-1.An-1.(Cn-1)c   + (Bn-1)c.(An-1)c.Cn-1

(Cn-1)c=Complement of Cn-1

+5 votes

suppose i m taking two +ve no and two -ve no and we perform its addition in two's complement no 

+70   0 1 0 0 0 1 1 0
+80   0 1 0 1 0 0 0 0
add   1 0 0 1 0 1 1 0
  cout msb c(n-1)            

here no carry is transfered to cout but c(n-1) is transfered to msb 

-70   1 0 1 1 1 0 1 0
-80   1 0 1 1 0 0 0 0
add 1 0 1 1 0 1 0 1 0
  cout msb c(n-1)            

 

here carry is transfered to cout and no c(n-1) is trasfered to msb

therefore,cout' c(n-1)+cout c(n-1)' =cout XOR C(n-1)

and another notable point is that there is no condition for overflow for +ve nd -ve no and also for -ve and +ve no

 

answered by Loyal (4.5k points)
edited by
0 votes

Option (c) is correct 

answered by (171 points)
–1 vote
ans a)
answered by Boss (5.3k points)
Answer:

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