1,936 views
2 2 votes
suppose that in 1000 memory reference there are 40 misses in the first level cache and 20 misses in the second level cache. Assume miss penalty from the L2 cache to memory is 100 cycles the hit time of the L2 cache is 10 clock cycles.the hit time of the L1 cache is 1 clock cycle. what is average memory access time?

2 Answers

0 0 votes
hit ratio of l2 is calculated wrong
Position:
Show:

Related questions

0 0 votes
2 2 answers
305
305 views
Julyanks asked May 13, 2025
305 views
0 0 votes
2 2 answers
595
595 views