Consider a program given below and run on a system that has 2-way set associative 16KB data cache with 32 bytes block where each word size is 32 bits and LRU replacement policy is used. If the base address of A is 0 initially cache is empty then the number of data cache misses are there.
int i , A[1024*1024], x=0;
for(i=0;i<1024;i++)
{
x=x+A[i]+A[1024*i];
}
