General doubt.

sushmita asked Dec 12, 2018

258 views

See all

Please log in or register to answer this question.

Related questions

0 votes

0 answers

newdreamz a1-z0 asked Dec 25, 2018

472 views

ME TEST
Consider Prof. Vamshi s writes a program given below and run on system which has 2-way set associative 16 KB data cache with 32 bytes block where each word size is 32 bits and LRU replacement policy used. If base address of array 'a is 0x0 and initially ... i] + a[1024* i]; what will be the physical memory size here?and how many bits should we assign for physical memory addressing?

Consider Prof. Vamshi‘s writes a program given below and run on system which has 2-way set associative 16 KB data cache with 32 bytes block where each word size is 32 b...

newdreamz a1-z0

472 views

newdreamz a1-z0 asked Dec 25, 2018

3 votes

2 answers

avinash41 asked Aug 9, 2017

823 views

set associative cache
The physical address size on a machine is 36 bits.The number of tag bits in the physical address format in a 256 KB, 16 way block set associative cache is____bits. What will be the ans?

The physical address size on a machine is 36 bits.The number of tag bits in the physical address format in a 256 KB, 16 way block set associative cache is____bits.What wi...

avinash41

823 views

avinash41 asked Aug 9, 2017

0 votes

2 answers

Ashwani Yadav asked Dec 22, 2018

936 views

Memory Heirarchy Doubt
Consider a single level cache with an access time of 2.5ns with a block size of 64 bytes. Main Memory uses a block transfer capability that has a first word (4 bytes) access time of 50ns and an access time of 5ns for each word ... to consider a Strict memory hierarchy method or Parallel accessing method in Solving these types of questions? By Default which way is followed?

Consider a single level cache with an access time of 2.5ns with a block size of 64 bytes. Main Memory uses a block transfer capability that has a first word (4 bytes) acc...

Ashwani Yadav

936 views

Ashwani Yadav asked Dec 22, 2018

0 votes

0 answers

sushmita asked Dec 12, 2018

550 views

conceptual doubt
in case of hierarchical memory organization when there is a miss in cache , we need to bring the entire block from main memory to cache so in the formula- AMAT= H1*T1+(1-H1(T1+T2)) T1- cache access time/word T2= memory access time/word T2 ... in some cases we just take word access time of main memory. also please tell me what should be T2 in case of simultaneous organization?

in case of hierarchical memory organization when there is a miss in cache , we need to bring the entire block from main memory to cache so in the formula-AMAT= H1*T1+(1-H...

sushmita

550 views

sushmita asked Dec 12, 2018

tags	tag:apple
author	user:martin
title	title:apple
content	content:apple
exclude	-tag:apple
force match	+apple
views	views:100
score	score:10
answers	answers:2
is accepted	isaccepted:true
is closed	isclosed:true

General doubt.

Please log in or register to add a comment.

Please log in or register to answer this question.

0 Answers

Related questions

0 reply

Please log in or register to add a comment.

Please log in or register to answer this question.

0 Answers

Related questions

0