level -> simultaneous access or parallel access-> H1(T1) +M1{(H2*T2) +(M2 * Tmemory)}
hierarchal -> H1(T1) +M1[{H2*(T2+T1)} +{M2 * (T2+T1+Tmemory)}]
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In question
Consider a single level cache
it means first formula will apply but
Main Memory uses a block transfer capability that has a first word access time of 50ns and an access time of 5ns thereafter
this line means that first we search in cache
if hit then we access in 2.5ns
and
if a miss occurs then
-> we access 16 words and transfer it to cache and access it
-> first transfer takes 50ns and remaining 15 words take 5 ns each
-> So Tmemory = 50+(15*5) ns=50+75 ns = 125 ns.
-> and then we access the word from cache in 2.5ns
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hence H1 = 0.95
T1= 2.5
M1 = 1-0.95 =0.05
Tmemory = 125ns.
H1(T1) +M1(Tmemory + T1)
=> 0.95*(2.5)+0.05*(125 + 2.5)
=>2.375 + 6.375
=> 8.75 ns