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GATE IT 2006 | Question: 8

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49 49 votes

Which of the following DMA transfer modes and interrupt handling mechanisms will enable the highest I/O band-width?

  1. Transparent DMA and Polling interrupts
  2. Cycle-stealing and Vectored interrupts
  3. Block transfer and Vectored interrupts
  4. Block transfer and Polling interrupts

3 Answers

Best answer
59 59 votes

CPU  get highest bandwidth in transparent DMA and polling. but it asked for I/O bandwidth not cpu bandwidth so option (A) is wrong.

In case of Cycle stealing, in each cycle time device send data then wait again after few CPU cycle it sends to memory . So option (B) is wrong.

In case of Polling CPU takes the initiative so I/O bandwidth can not be high so option (D) is wrong .

Consider Block transfer, in each single block device send data so bandwidth ( means the amount of data ) must be high . This makes option (C) correct.

• edited by
27 27 votes
The answer is option C .

In block transfer the entire block of data is transfered then only CPU again becomes the bus master

And in vectored Interrupts . I/o device along with interrupts send vector address of Interrupt Service routine which guides CPU to execute for a specific I/O device

Hence in both case BW will be required in a good amount !
• edited by
3 3 votes

 

Option Analysis
Option 1: Transparent DMA and Polling Interrupts

  • Transparent DMA limits I/O bandwidth because transfers occur only during CPU idle times.
  • Polling further reduces efficiency as it wastes CPU cycles checking device statuses.
  • Verdict: Low I/O bandwidth.

Option 2: Cycle-Stealing DMA and Vectored Interrupts

  • Cycle-stealing DMA improves I/O bandwidth compared to Transparent DMA by transferring data one bus cycle at a time.
  • Vectored interrupts are efficient for handling I/O requests.
  • Verdict: Moderate I/O bandwidth.

Option 3: Block Transfer DMA and Vectored Interrupts

  • Block transfer DMA allows high I/O bandwidth by transferring data in bursts, maximizing bus usage.
  • Vectored interrupts minimize CPU overhead, enabling efficient and fast I/O handling.
  • Verdict: Highest I/O bandwidth.

Option 4: Block Transfer DMA and Polling Interrupts

  • While block transfer DMA provides high I/O bandwidth, polling interrupts waste CPU cycles checking device statuses, reducing overall efficiency.
  • Verdict: Moderate I/O bandwidth.


    NOTE:Why Does Burst Mode Achieve Higher Bandwidth?

    The higher bandwidth of Burst Mode comes down to reduced bus switching overhead

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