Applied test series question

Question

A 4-bit carry lookahead adder adds two 4-bit numbers. The adder is designed without making use of the EX-OR gates. The propagation delay for all gates is given as 2.4 time units. What will be the overall delay of adder if we assume that inputs are made available in both complemented and uncomplemented form and carry network has been implemented using AND, Or gates.

can someone explain me this in a deatiled manner as i am not able to find the appropriate solution for it ?

Comments

@neel19 Ans given was 14.4units 

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That means they've not considered the NOT gate delay of pi's and ci's in the last part. Just remove the delays of NOT GATE and you get the answer - 14.4 units.

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@neel19  in options there was no option like 16.8units but my concern is that if it would have given 14.4 and none of these , then how to make sure that we have to consider the delays of NOT GATE or not as in question it hasn’t mentioned anything ??

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@shikhar500 i would suggest you to watch digital electronics course of @GO Classes after watching it these questions will just be a cakewalk for you and all yours doubts like when to take not delay and when not will get cleared.

Answer 1

Let me know if you find something wrong. 

Answer 2

Required Knowledge:

With the general assumption that a single-level gate implementation is always faster than a two-level gate implementation,

i.e., A single level of XOR will be faster than 2 levels of AND-OR

 

In 4-bit Ripple Carry Adder, or Binary Parallel Adder

Propagation delay = $\{4 \times (\text{ 2-level AND-OR })\} + (1 \times \text{ XOR})$

In 4-bit CLA (Carry Lookahead Adder)

Propagation Delay = $(2 \times \text{XOR}) + \{1 \times (\text{ 2-level AND-OR }) \}$

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Given:

> Inputs are available in complemented and uncomplemented form

> XOR gates are not available

> Only AND/OR gates are available

> All gates have a propagataion delay of $2.4$ units

 

XOR can be constructed with 2-levels of AND-OR

since, $A \oplus B = AB’ + A’B = level_1\{A\times B’, A’\times B\} + level_2\{AB’ + A’B\}$

 

Propagation delay of CLA $= 2 \times \{level_1 + level_2\} + 1 \times \{level_1 + level_2\} = 3 \times \{level_1 + level_2\}$

$ = 6 \times \text{ANY-GATE} = 6 \times 2.4 = 14.4$

Comments

Gate Levels of Ripple Carry Adder / Binary Parallel Adder

Fig: Binary Parallel Adder

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Gate Levels of Carry Lookahead Adder(CLA)

Fig: Carry Lookahead Adder (CLA)

 

Answer 3

Carry = Generated term(i-1) + propagate term(i-1) * Carry (i-1)

As XOR gate i.e A xor B = A'B + AB'

and it is given that input is given in both forms. So it will require 2.4+2.4=4.8 unit to do XOR.

 

then carry generation will take 4.8+2.4+2.4 = 9.6unit.

 

At last we have to do sum after we got the carry, so it will be done using XOR gate which will require another 4.8 unit, so net time taken is 9.6+4.8 = 14.4unit