Pipelined operation is interrupted whenever two operations, being attempted in parallel need same hardware component. Such a conflict can occur if _____.
(a)
The execution phase of an instruction requires access to the main memory, which also contains the next instruction that should be fetched at the same time
(b)
The prefetch phase of an instruction requires access to the main memory, which also contains the next instruction that should be fetched at the same time
(c)
The decode phase of an instruction requires access to the main memory, which also contains the next instruction that should be fetched at the same time
(d)
All of the above
(e)
None of these
