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Consider a system with 4KB page size and 3-level paging is used. The virtual address space is 36 bits and the physical address space is 32 bits. The page table entry at every level is 16 bytes. The number of frames required to store all the level page tables, if each level uses 8 bits for page table indexing and each page table fits one page-frame
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Since page size = 4KB and PTE = 16 bytes, number of entries in single page = 2^8.

No of pages in virtual space = 2^24 pages (total virtual size/page size) and so our page table will have 2^24 PTEs

Now these entries will be stored in page sized frames itself inside the memory for MMU and OS to use. Multilevel pages Kindof sparse page table index

At third level we need to store 2^24 PTEs, will need frames/pages = 2^24/2^8 = 2^16 frames (to store all 2^24 PTEs)

At second level, we need to store 2^16 PTEs for locating all frames in third level, we will need frames/pages = 2^16/2^8 = 2^8 frames

At first level, we need to store 2^8 PTEs for locating all frames in second level, we will need frames/pages = 2^8/2^8 = 1 frame

Hence total frames/pages needed to store the 2^24 PTEs of single process at all levels = (2^16 + 2^8 + 1) frames.

I hope this is the answer 🤞. Please anyone correct me if I missed anything
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