GATE CSE 2025 | Set 1 | Question: 27

Question

A processor has $64$ general-purpose registers and $50$ distinct instruction types. An instruction is encoded in $32$-bits. What is the maximum number of bits that can be used to store the immediate operand for the given instruction?

$\text{ADD R1}$, $\#25$  / /  $\text{R 1=R 1+25}$

• A. $16$
• B. $20$
• C. $22$
• D. $24$

Comments

Answer 20 bits,,,https://correctbrain.com/buy/

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The #symbol explicitly tells you that this is an Immediate Addressing Mode instruction

The purpose of including ADD R1, #25 

• The instruction shows only one register (R1). This tells you that the CPU uses (R1) as both the source and destination. You only subtract 6 bits  for registers ((32 - 6 (opcode) - 6 (one register) = 20  bits)

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Similar Question 

https://gateoverflow.in/39547/gate-cse-2016-set-2-question-10

Answer 1

(B) 20

we need 6 bits to represent registers
we need 6 bits to represent opcode (we have 50 distinct types of instructions)
we have 32 bits instruction
 

[ OPCODE | REGISTER | VALUE]
[ 6 | 6 | 32-(6+6) ]
= 32 - 12
= 20

Maximum 20 bits can be used to store immediate operand.

Comments

But we also have address modes also in a instruction. Why are we not considering that?

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included in operand field info.

Answer 2

<------------------------------------------------- 32bits-------------------------------------->

Opcode

Register

Operand

Opcode=no.of bits to address differnt instructions=ceil(log(50))=6

There are 64 registers.So log(64)=6 bits needed to address all registers

Remaining bits for operands=32-(6+6)=20 bits

Answer 3

Ans = 20