#Gate , #COA, #DMA_transfer ,#modes_of_data_transfer

Question

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A device is constantly transferring the data with 20KBps speed to memory using DMA. Assume that the transmission time to memory from IO once the data (1B) is ready is 5 microsec. Further assume that a file of 5KB needs to be transferred to memory.Find

1. % of the time CPU is blocked due to DMA in burst mode
2. % of the time CPU is blocked die to DMA in cycle stealing mode

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Answer 1

 

• Device Data Transfer Speed: $20 \text{ KBps}$ ($20,000 \text{ Bytes/sec}$).

  • This means the device produces 1 Byte of data every:

    $$T_{device} = \frac{1 \text{ second}}{20,000 \text{ Bytes}} = 50 \text{ microseconds} (\mu s)$$

• Transmission Time (DMA to Memory): $5 \mu s$ per Byte.

  • This is the time the DMA controller needs to use the bus to transfer 1 Byte to memory once it is ready.

• File Size: $5 \text{ KB}$ ($5,000 \text{ Bytes}$).

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1. Cycle Stealing Mode

In Cycle Stealing Mode, the DMA controller transfers data byte-by-byte. It waits for the device to produce a byte, then "steals" a bus cycle to transfer it, and then releases the bus back to the CPU while waiting for the next byte.

• Operation:

  1. Device takes $50 \mu s$ to prepare 1 Byte.

  2. DMA steals the bus for $5 \mu s$ to write that Byte to memory.

  3. The bus is free for the CPU during the remaining $45 \mu s$ of the cycle.

• Percentage of Time Blocked:

  The CPU is blocked only when the DMA is using the bus ($5 \mu s$) out of the total time interval per byte ($50 \mu s$).

   

  $$\% \text{ Blocked} = \frac{\text{Time bus is busy}}{\text{Total time per byte}} \times 100$$

  $$\% \text{ Blocked} = \frac{5 \mu s}{50 \mu s} \times 100 = \mathbf{10\%}$$

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2. Burst Mode

In Burst Mode, the DMA controller requests the bus and, once granted, holds it until the entire block of data (the file) is transferred. It does not release the bus between bytes.

• Operation:

  1. The DMA acquires the bus.

  2. It must transfer the $5 \text{ KB}$ file.

  3. Since the device is slow ($20 \text{ KBps}$), the DMA must wait for the device to produce each byte while holding the bus.

  4. It waits $50 \mu s$, transfers (instantaneously in the window), waits $50 \mu s$... effectively blocking the bus for the entire duration determined by the slow device.

• Percentage of Time Blocked:

  Since the DMA holds the bus for the entire time required to transfer the file at the device's speed, the CPU is blocked for 100% of the transfer duration.

  • Total Transfer Duration = $0.25 \text{ seconds}$.

  • CPU Blocked Duration = $0.25 \text{ seconds}$.

  • Result: 100%