ISRO CSE 2011 | Question: 58

Question

In DMA transfer scheme, the transfer scheme other than burst mode is

• A. cycle technique
• B. stealing technique
• C. cycle stealing technique
• D. cycle bypass technique

Answer 1

Answer is C

1) Cycle Steal:

A read or write signal is generated by the DMAC, and the I/O device either generates or latches the data. The DMAC effectively steals cycles from the processor in order to transfer the byte, so single byte transfer is also known as cycle stealing.

2) Burst Transfer:

To achieve block transfers, some DMAC's incorporate an automatic sequencing of the value presented on the address bus. A register is used as a byte count, being decremented for each byte transfer, and upon the byte count reaching zero, the DMAC will release the bus. When the DMAC operates in burst mode, the CPU is halted for the duration of the data transfer.

3) Hidden DMA:

It is possible to perform hidden DMA, which is transparent to the normal operation of the CPU. In other words, the bus is grabbed by the DMAC when the processor is not using it. The DMAC monitors the execution of the processor, and when it recognises the processor executing an instruction which has sufficient empty clock cycles to perform a byte transfer, it waits till the processor is decoding the op code, then grabs the bus during this time.  The processor is not slowed down, but continues processing normally. Naturally, the data transfer by the DMAC must be completed before the processor starts

Comments

give any resource related to this topic  ,any link ??

thank in advance

Answer 2

Ans: Option C

DMA will transfer in three modes

1. Burst Mode
2. Cycle Stealing Mode
3. Block Transfer ( which has features of both two modes and depends on block size)

Answer 3

C. cycle stealing mode

Answer 4

The answer is C "Cycle Stealing mode"

Answer 5

Direct memory access (DMA) is a method that allows an input/output (I/O) device to send or receive data directly to or from the main memory, bypassing the CPU to speed up memory operations.
DMA transfers can transfer either one byte at a time or all at once in burst mode. If they transfer a byte at a time, this can allow the CPU to access memory on alternating bus cycles – this is called cycle stealing since the CPU and either the DMA controller or the bus master contend for memory access.
In burst mode DMA, the CPU can be put on hold while the DMA transfer occurs and a full block of possibly hundreds or thousands of bytes can be moved.