2,291 views

1 Answer

Best answer
14 14 votes

In 1s CPU makes 300 million ticks, so time for a tick (clock time) is 1/(300 * 106 )  = 3.3 ns.  

For 900 cycles, CPU time will be 900*3.3 = 2970 ns = 2.97µs 


Now, time for data transfer = 200/5000s = 40ms = 40000 µs 

So, percentage of CPU time for transfer =  2.97/(40000+ 2.97) = 0.0074%

• selected by
Position:
Show:

Related questions

78 78 votes
5 answers 5 answers
24.9k
24.9k views
go_editor asked Sep 29, 2014
24,903 views
On a non-pipelined sequential processor, a program segment, which is the part of the interrupt service routine, is given to transfer $500$ bytes from an I/O device to mem...
0 0 votes
1 1 answer
625
625 views
N_i_t_i_n asked Sep 13, 2025
625 views
During DMA transfers, the CPU is momentarily halted while the DMA controller takes control of the system busTrue or False?
2 2 votes
0 0 answers
626
626 views
kohz asked Jan 15, 2025
626 views
is'nt it possible for CPU And DMA cycles to overlapp if cpu does some cpu intensive work which does not need Bus
3 3 votes
1 1 answer
1.0k
1.0k views
Miracle124 asked Oct 18, 2024
1,017 views
DMA
Consider 4 MBPS IO devices connected to 64 bit CPU using DMA interface. 64 words data is transfer from the IO to memory using DMA interface. Main memory machine cycle tim...