GATE CSE 2015 | Set 2 | Question: 48

Question

A half adder is implemented with XOR and AND gates. A full adder is implemented with two half adders and one OR gate. The propagation delay of an XOR gate is twice that of an AND/OR gate. The propagation delay of an AND/OR gate is $1.2$ microseconds. A $4$-bit-ripple-carry binary adder is implemented by using four full adders. The total propagation time of this $4$-bit binary adder in microseconds is ______.

Comments

@Pranavpurkar, i think for the carry look ahead adder , the total propagation delay would be $7.2$$\mu s$ 

@ybairwa786 can you confrim this ?

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One thing to understand before solving this question is that  :- In Ripple carry adder, a stage doesn’t wait for the “full output” of previous stage. It only waits for the previous stage’s carry to reach to itself. 

Delay of ExOR  = 2*(delay of AND/OR)

                          = 2*1.2 = 2.4ms

now, Full Adder is implemented using 2 HA(Half  Adder) and a OR gate

so,

delay of Sum (S) =  2* delay of ExOR .......(for sum o/p  in FA it uses two ExOR gates)                                   

                            = 4.8 ms

 delay of Carry (C) = 1Exor +1 AND + 1OR  ......(this is the critical path for the carry o/p in FA)

                              = 4.8ms

now, Ripple carry adder is implemented using 4 FA

At t= 4.8ms, both S0 and C1 are valid 

to get S1,C1 must be valid....(previos stage carry is needed to compute S)

       Delay of S1 = 4.8 + 2.4           (as S1 is dependent on C1..so Delay of C1 (4.8) + After                                                                                                   C1, one additional ExOR is needed for S1 (2.4))

                          = 7.2ms

 therefore S1 is valid at 7.2ms

now, C2 is valid after 7.2 ms becuz, C2 will need only AND and OR gate to be computed

          4.8+ 2.4  

therefore C2 is valid after 7.2ms

now,

To find S2 we'll be needing C2,  so,

     delay of S2 = Delay of C2 + delay of ExOR 

                        = 7.2+2.4

                        = 9.6ms

therefore S2 is vallid after 9.6ms

delay of C3 = delaay of C2 + Delay of AND and OR gate 

                   = 7.2+2.4

                   = 9.6ms

therefore C3 is valid after 9.6ms

 

similarly to find S3 we'll be needing C3; 

     S3 = delay of C3 + delay of ExOR

          = 9.6+2.4

          = 12ms

therefore S3 is valid after 12ms

 

final answer 12ms

 

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@Arjun Sir

 

As it is mentioned in the question that a half adder is implemented with XOR and AND gates. A full adder is implemented with two half adders and one OR gate but there are two possible implementations for FA with two HA's and one OR gate

Implementation 1 : 

In this case Delay of Sum(s) = 2 HA'S = 2 EXOR gates = 2*2.4 = 4.8 μs

                   Delay of carry(k) = 2 HA'S + 1 OR gate = 4.8+1.2 = 6.0 μs

The total delay of the 4 bit binary adder = 24 μs (if we assume all the inputs are not available intially)

The total delay of the 4 bit binary adder = 16.8 μs (if we assume all the inputs are available intially)

Implementation 2 : 

In this case Delay of Sum(s) = 2 EXOR gates = 2*2.4 = 4.8 μs

                   Delay of carry(k) = 1 EXOR gate + 1 AND gate + 1 OR gate = 2.4 + 1.2 + 1.2 = 4.8 μs

The total delay of the 4 bit binary adder = 19.2 μs (if we assume all the inputs are not available intially)

The total delay of the 4 bit binary adder = 12 μs (if we assume all the inputs are available intially)

Now what i'm asking is there are 4 different answers and each of them having proof what we have to conclude from this ?

I really confused ; need your conclusion @Arjun sir.

Answer 1

Formula for propogation delay when internal circuit implementation of ripple carrry adder is given:

T=(n-1)[T(AND)+T(OR)]+2*T(XOR)
here n:number of bits
so putting the values
T=(4-1)[1.2+1.2]+2*(2.4)
T=3*2.4+4.8

T=12 microseconds

Comments

not able to understand this

Answer 2

Total propagation time = [ (N-1)*(T and + T or) + 2*T xor ] ,when calculating using this = (4-1)(1.2+1.2)+2*2.4 =12 Here T and is Propagation delay of AND similarly for OR and XOR .