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In a computer system, there are $5$ registers, namely -- $PC, AR, DR, IR,$ and $SC$. The initial content of $PC$ is $7FF$. The content of memory at address $7FF$ is $EA9F$;  at address $A9F$ is $0C35$;  at address $C35$ is $FFFF$. (All register contents are in hexadecimal format).

When an ISZ indirect instruction is fetched from memory and executed, the content of $PC$ register after $6$ clock pulse is ________ (put the integer value of register content).

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T0:AR<-PC Ar<-7FF

T1:IR<-M[AR];PC<-PC+1 IR<-EA9F and PC<-800

T2:Decode and AR<-IR(0....11) AR<-A9F

T3:AR<-M[AR] AR<-0C35

these 4 cycles will be common to all instructions ie Fetch,decode and compute effective address

Now for execute phase:

T4:DR<-M[AR] DR<FFFF

T5:DR<-DR+1 DR<-0000

T6:M[AR]<-DR;if (DR==0) then PC<-PC+1; SC<-0.....condition is true therefore PC<-801
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 Timing signals  PC Register content AR DR IR SC
 Initial                        7FF       0
 T0                           7FF 7FF     1
 T1                          800 7FF   EA9F 2
 T2                         800 A9F   EA9F 3
 T3                          800 C35   EA9F 4
 T4                        800 C35 FFFF EA9F 5
 T5                         800 C35 0000 EA9F 6
 T6                        801 C35 0000 EA9F 0

 
 

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