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Recent questions tagged memory-management
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181
Andrew S. Tanenbaum (OS) Edition 4 Exercise 3 Question 4 (Page No. 254)
Consider a swapping system in which memory consists of the following hole sizes in memory order: $10\: MB, 4\: MB, 20\: MB, 18\: MB, 7\: MB, 9\: MB, 12\: MB,$ and $15\: MB$. Which hole is taken for successive segment ... $10\: MB$ $9\: MB$ for first fit? Now repeat the question for best fit, worst fit, and next fit.
Consider a swapping system in which memory consists of the following hole sizes in memory order: $10\: MB, 4\: MB, 20\: MB, 18\: MB, 7\: MB, 9\: MB, 12\: MB,$ and $15\: M...
admin
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admin
asked
Oct 25, 2019
Operating System
tanenbaum
operating-system
memory-management
descriptive
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182
Andrew S. Tanenbaum (OS) Edition 4 Exercise 3 Question 3 (Page No. 254)
A swapping system eliminates holes by compaction. Assuming a random distribution of many holes and many data segments and a time to read or write a $32-bit$ memory word of $4\:nsec$, about how long does it take to ... simplicity, assume that word $0$ is part of a hole and that the highest word in memory contains valid data.
A swapping system eliminates holes by compaction. Assuming a random distribution of many holes and many data segments and a time to read or write a $32-bit$ memory word o...
admin
1.3k
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admin
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Oct 25, 2019
Operating System
tanenbaum
operating-system
memory-management
descriptive
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0
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1
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183
Andrew S. Tanenbaum (OS) Edition 4 Exercise 3 Question 2 (Page No. 254)
In Fig. $3-3$ the base and limit registers contain the same value, $16,384$. Is this just an accident, or are they always the same? It is just an accident, why are they the same in this example?
In Fig. $3-3$ the base and limit registers contain the same value, $16,384$. Is this just an accident, or are they always the same? It is just an accident, why are they t...
admin
1.6k
views
admin
asked
Oct 25, 2019
Operating System
tanenbaum
operating-system
memory-management
descriptive
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184
Andrew S. Tanenbaum (OS) Edition 4 Exercise 3 Question 1 (Page No. 254)
The $IBM\:360$ had a scheme of locking $2-KB$ blocks by assigning each one a $4-bit$ key and having the CPU compare the key on every memory reference to the $4-bit$ key in the $PSW$. Name two drawbacks of this scheme not mentioned in the text.
The $IBM\:360$ had a scheme of locking $2-KB$ blocks by assigning each one a $4-bit$ key and having the CPU compare the key on every memory reference to the $4-bit$ key i...
admin
381
views
admin
asked
Oct 25, 2019
Operating System
tanenbaum
operating-system
memory-management
descriptive
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185
Andrew S. Tanenbaum (OS) Edition 4 Exercise 1 Question 27 (Page No. 83)
Modern operating systems decouple a process address space from the machine’s physical memory. List two advantages of this design.
Modern operating systems decouple a process address space from the machine’s physical memory. List two advantages of this design.
admin
538
views
admin
asked
Oct 23, 2019
Operating System
tanenbaum
operating-system
memory-management
descriptive
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1
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3
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186
Self Doubt:Paging
I have read that paging does not suffer from external fragmentation as the frames and the pages are all of the equal sizes, but when we store a last level page table in a frame at that time it may not fully occupy the frame. Similarly, if ... exceed a page size. Then there should be external fragmentation, right? So why is it said that paging does not have external fragmentation?
I have read that paging does not suffer from external fragmentation as the frames and the pages are all of the equal sizes, but when we store a last level page table in a...
Hirak
1.7k
views
Hirak
asked
Jun 13, 2019
Operating System
memory-management
paging
operating-system
multilevel-paging
self-doubt
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1
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2
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187
Mode of OS during page table access
What is the mode(User/Kernel) of the Operating System when a Page Table or TLB are being accessed?
What is the mode(User/Kernel) of the Operating System when a Page Table or TLB are being accessed?
!KARAN
596
views
!KARAN
asked
May 18, 2019
Operating System
memory-management
paging
operating-system
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2
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188
#arrays
i write this program, during initialization of array i given the size as 11 means the number of elements stored in an array is 11. as we know array is not assigned a value of index 12 and above. but in in the program array a is initialized of index from 0 to 19,my question is how the array is ... i=0;i<20;i++) { a[i]=i+1; } for(i=0;i<20;i++) { printf("%d\n",a[i]); } }
i write this program, during initialization of array i given the size as 11 means the number of elements stored in an array is 11.as we know array is not assigned a value...
shiva0
700
views
shiva0
asked
Apr 7, 2019
Programming in C
programming-in-c
programming
array
memory-management
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0
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1
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189
#Dynamic memory allocation malloc
how to know how much size is allocated while dynamically allocating memory to the pointer variable with malloc. i just write the below code to know the size of ptr2 after dynamically allocating memory. i want the output is 10 but it is displaying as 2 as ... allocation failed"); else{ printf("size of *ptr2 is == %d\n",(sizeof(ptr2)/sizeof(int))); } }
how to know how much size is allocated while dynamically allocating memory to the pointer variable with malloc.i just write the below code to know the size of ptr2 after ...
shiva0
682
views
shiva0
asked
Apr 6, 2019
Programming in C
programming-in-c
memory-management
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190
Galvin Edition 9 Exercise 9 Question 38 (Page No. 456)
Consider a system that allocates pages of different sizes to its processes. What are the advantages of such a paging scheme ? What modifications to the virtual memory system provide this functionality ?
Consider a system that allocates pages of different sizes to its processes. What are the advantages of such a paging scheme ? What modifications to the virtual memory sys...
akash.dinkar12
749
views
akash.dinkar12
asked
Mar 22, 2019
Operating System
galvin
operating-system
memory-management
paging
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0
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0
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191
Galvin Edition 9 Exercise 8 Question 32 (Page No. 393-394)
Consider the Intel address-translation scheme shown in Figure 8.22. a. Describe all the steps taken by the Intel Pentium in translating a logical address into a physical address. b. What are the advantages to the operating system of ... -translation system? If so, what are they? If not, why is this scheme not used by every manufacturer ?
Consider the Intel address-translation scheme shown in Figure 8.22.a. Describe all the steps taken by the Intel Pentium in translating a logical address into a physical a...
akash.dinkar12
715
views
akash.dinkar12
asked
Mar 21, 2019
Operating System
galvin
operating-system
memory-management
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1
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1
answer
192
Galvin Edition 9 Exercise 8 Question 31 (Page No. 393)
Compare the segmented paging scheme with the hashed page table scheme for handling large address spaces. Under what circumstances is one scheme preferable to the other ?
Compare the segmented paging scheme with the hashed page table scheme for handling large address spaces. Under what circumstances is one scheme preferable to the other ?
akash.dinkar12
2.1k
views
akash.dinkar12
asked
Mar 21, 2019
Operating System
galvin
operating-system
memory-management
descriptive
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193
Galvin Edition 9 Exercise 8 Question 30 (Page No. 393)
Consider the hierarchical paging scheme used by the $VAX$ architecture. How many memory operations are performed when a user program executes a memory-load operation ?
Consider the hierarchical paging scheme used by the $VAX$ architecture. How many memory operations are performed when a user program executes a memory-load operation ?
akash.dinkar12
246
views
akash.dinkar12
asked
Mar 21, 2019
Operating System
galvin
operating-system
memory-management
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1
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194
Galvin Edition 9 Exercise 8 Question 29 (Page No. 393)
What is the purpose of paging the page tables ?
What is the purpose of paging the page tables ?
akash.dinkar12
380
views
akash.dinkar12
asked
Mar 21, 2019
Operating System
galvin
operating-system
memory-management
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0
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1
answer
195
Galvin Edition 9 Exercise 8 Question 28 (Page No. 393)
Consider the following segment table: $Segment$ $Base$ $Length$ $0$ $219$ $600$ $1$ $2300$ $14$ $2$ $90$ $100$ $3$ $1327$ $580$ $4$ $1952$ $96$ What are the physical addresses for the following logical addresses ? $a. 0,430$ $b. 1,10$ $c. 2,500$ $d. 3,400$ $e. 4,112$
Consider the following segment table: $Segment$ $Base$ $Length$ $0$ ...
akash.dinkar12
9.4k
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akash.dinkar12
asked
Mar 21, 2019
Operating System
galvin
operating-system
memory-management
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1
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196
Galvin Edition 9 Exercise 8 Question 27 (Page No. 393)
Explain why sharing a reentrant module is easier when segmentation is used than when pure paging is used.
Explain why sharing a reentrant module is easier when segmentation is used than when pure paging is used.
akash.dinkar12
824
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akash.dinkar12
asked
Mar 21, 2019
Operating System
galvin
operating-system
memory-management
descriptive
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197
Galvin Edition 9 Exercise 8 Question 26 (Page No. 393)
Why are segmentation and paging sometimes combined into one scheme ?
Why are segmentation and paging sometimes combined into one scheme ?
akash.dinkar12
280
views
akash.dinkar12
asked
Mar 21, 2019
Operating System
galvin
operating-system
memory-management
descriptive
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1
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198
Galvin Edition 9 Exercise 8 Question 25 (Page No. 393)
Consider a paging system with the page table stored in memory. a. If a memory reference takes 50 nanoseconds, how long does a paged memory reference take ? b. If we add $TLBs$, and 75 percent of all page-table references are found ... time ? (Assume that finding a page-table entry in the $TLBs$ takes 2 nanoseconds, if the entry is present.)
Consider a paging system with the page table stored in memory.a. If a memory reference takes 50 nanoseconds, how long does a paged memory reference take ?b. If we add $TL...
akash.dinkar12
693
views
akash.dinkar12
asked
Mar 21, 2019
Operating System
galvin
operating-system
memory-management
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1
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199
Galvin Edition 9 Exercise 8 Question 23 (Page No. 392)
Consider a logical address space of $256$ pages with a $4-KB$ page size, mapped onto a physical memory of $64$ frames. $a$. How many bits are required in the logical address ? $b$. How many bits are required in the physical address ?
Consider a logical address space of $256$ pages with a $4-KB$ page size, mapped onto a physical memory of $64$ frames.$a$. How many bits are required in the logical addre...
akash.dinkar12
518
views
akash.dinkar12
asked
Mar 21, 2019
Operating System
galvin
operating-system
memory-management
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0
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200
Galvin Edition 9 Exercise 8 Question 22 (Page No. 392)
What is the maximum amount of physical memory ?
What is the maximum amount of physical memory ?
akash.dinkar12
278
views
akash.dinkar12
asked
Mar 21, 2019
Operating System
galvin
operating-system
memory-management
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1
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1
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201
Galvin Edition 9 Exercise 8 Question 21 (Page No. 392)
The BTV operating system has a $21-bit$ virtual address, yet on certain embedded devices, it has only a $16-bit$ physical address. It also has a $2-KB$ page size. How many entries are there in each of the following ? $a$. A conventional, single-level page table $b$. An inverted page table
The BTV operating system has a $21-bit$ virtual address, yet on certain embedded devices, it has only a $16-bit$ physical address. It also has a $2-KB$ page size. How man...
akash.dinkar12
2.3k
views
akash.dinkar12
asked
Mar 21, 2019
Operating System
galvin
operating-system
memory-management
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1
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1
answer
202
Galvin Edition 9 Exercise 8 Question 20 (Page No. 392)
Assuming a $1$ $KB$ page size, what are the page numbers and offsets for the following address references (provided as decimal numbers): $a. 3085$ $b. 42095$ $c. 215201$ $d. 650000$ $e. 2000001$
Assuming a $1$ $KB$ page size, what are the page numbers and offsets for the following address references (provided as decimal numbers):$a. 3085$$b. 42095$$c. 215201$$d. ...
akash.dinkar12
2.3k
views
akash.dinkar12
asked
Mar 21, 2019
Operating System
galvin
operating-system
memory-management
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0
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0
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203
Galvin Edition 9 Exercise 8 Question 19 (Page No. 392)
Program binaries in many systems are typically structured as follows. Code is stored starting with a small, fixed virtual address, such as $0$. The code segment is followed by the data segment that is used for storing the program ... structure for the following schemes ? $a$. Contiguous memory allocation $b$. Pure segmentation $c$. Pure paging
Program binaries in many systems are typically structured as follows. Code is stored starting with a small, fixed virtual address, such as $0$. The code segment is follow...
akash.dinkar12
368
views
akash.dinkar12
asked
Mar 21, 2019
Operating System
galvin
operating-system
memory-management
descriptive
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0
votes
0
answers
204
Galvin Edition 9 Exercise 8 Question 18 (Page No. 392)
Explain why address space identifiers ($ASIDs$) are used.
Explain why address space identifiers ($ASIDs$) are used.
akash.dinkar12
252
views
akash.dinkar12
asked
Mar 21, 2019
Operating System
galvin
operating-system
memory-management
descriptive
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0
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0
answers
205
Galvin Edition 9 Exercise 8 Question 17 (Page No. 392)
Compare paging with segmentation with respect to how much memory the address translation structures require to convert virtual addresses to physical addresses.
Compare paging with segmentation with respect to how much memory the address translation structures require to convert virtual addresses to physical addresses.
akash.dinkar12
235
views
akash.dinkar12
asked
Mar 21, 2019
Operating System
galvin
operating-system
memory-management
descriptive
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1
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0
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206
Galvin Edition 9 Exercise 8 Question 16 (Page No. 392)
Although Android does not support swapping on its boot disk, it is possible to set up a swap space using a separate SD nonvolatile memory card. Why would Android disallow swapping on its boot disk yet allow it on a secondary disk ?
Although Android does not support swapping on its boot disk, it is possible to set up a swap space using a separate SD nonvolatile memory card. Why would Android disallow...
akash.dinkar12
554
views
akash.dinkar12
asked
Mar 21, 2019
Operating System
galvin
operating-system
memory-management
descriptive
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0
votes
0
answers
207
Galvin Edition 9 Exercise 8 Question 15 (Page No. 392)
Explain why mobile operating systems such as iOS and Android do not support swapping ?
Explain why mobile operating systems such as iOS and Android do not support swapping ?
akash.dinkar12
217
views
akash.dinkar12
asked
Mar 21, 2019
Operating System
galvin
operating-system
memory-management
descriptive
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0
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0
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208
Galvin Edition 9 Exercise 8 Question 14 (Page No. 391)
On a system with paging, a process cannot access memory that it does not own. Why ? How could the operating system allow access to other memory ? Why should it or should it not ?
On a system with paging, a process cannot access memory that it does not own. Why ? How could the operating system allow access to other memory ? Why should it or should ...
akash.dinkar12
297
views
akash.dinkar12
asked
Mar 21, 2019
Operating System
galvin
operating-system
memory-management
descriptive
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0
votes
0
answers
209
Galvin Edition 9 Exercise 8 Question 13 (Page No. 391)
Compare the memory organization schemes of contiguous memory allocation, pure segmentation, and pure paging with respect to the following issues: $a$. External fragmentation $b$. Internal fragmentation $c$. Ability to share code across processes
Compare the memory organization schemes of contiguous memory allocation, pure segmentation, and pure paging with respect to the following issues:$a$. External fragmentati...
akash.dinkar12
548
views
akash.dinkar12
asked
Mar 21, 2019
Operating System
galvin
operating-system
memory-management
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1
votes
2
answers
210
Galvin Edition 9 Exercise 8 Question 12 (Page No. 391)
Most systems allow a program to allocate more memory to its address space during execution. Allocation of data in the heap segments of programs is an example of such allocated memory. What is required to support dynamic memory allocation in the following schemes ? $a$. Contiguous memory allocation $b$. Pure segmentation $c$. Pure paging
Most systems allow a program to allocate more memory to its address space during execution. Allocation of data in the heap segments of programs is an example of such allo...
akash.dinkar12
3.3k
views
akash.dinkar12
asked
Mar 21, 2019
Operating System
galvin
operating-system
memory-management
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