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Cache Memory

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Lets go step by step.

1) First access: 0

   I generated miss.ok, fine.

2) 2nd access: 2

   It was hit.

   Now, observed closely the options. In option A, block size=2. If this was the case, this would have generated a miss.

   So, option A is eliminated.

 3) 3rd access: 4

     It generated a miss. Now, consider option B. If block size=128, then this should have been a hit.

     So, option B eliminated.

     Now, we prove that option C is also wrong. OPtion (C) says that in single set, there can 128 blocks with BS=4bytes (which            says cache is greater than M.M. Quite possible, atleast hypothetically!).

      So, a block, once brought in would always generate a hit. But we see that access to address 0 (i.e. 3rd last zero) is a miss.

      So, option C also eliminated.

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