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Consider the partial implementation of a $2-bit$ counter using $T$ flip-flops following the sequence $0-2-3-1-0,$ as shown below.

To complete the circuit, the input $X$ should be

  1. $Q_2^c$
  2. $Q_2 + Q_1$
  3. $\left(Q_1 + Q_2\right)^c$
  4. $Q_1 \oplus Q_2$
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5 Answers

Best answer
102 votes
102 votes
Sequence is $0-2-3-1-0$

From the given sequence, we have state table as
$${\begin{array}{c|c|c|c}
\bf{Q_2}&    \bf{Q_1}&  \bf{Q_2^+}&\bf{ Q_1^+}\\\hline
0&0&1&0 \\\hline 0&1&0&0 \\ \hline    1&0&1&1 \\ \hline   1&1&0&1 \\  
\end{array}}$$
Now we have present state and next state, use excitation table of $T$ flip-flop
$${\begin{array}{c|c|c|c}
\bf{Q_2}&    \bf{Q_1}&  \bf{Q_2^+}&\bf{ Q_1^+} & \bf{T_2} & \bf{T_1}\\\hline
0&0&1&0 & 1&0\\\hline 0&1&0&0&0&1 \\ \hline    1&0&1&1&0&1 \\ \hline   1&1&0&1&1&0 \\    
\end{array}}$$

From state table, $T_2=Q_2 \odot Q_1$, and $T_1 = Q_2 \oplus Q_1 $

$X=T_1 = Q_2 \oplus Q_1 $

Correct Answer: $D$
edited by
33 votes
33 votes

Design a 2-bit counter using T - Flip Flop Which will follow the sequence $0-2-3-1-0$

STEP-1: Find the Minimum Number of Flip-Flops Required

Here , we are having $4$ distinct states so we need minimum $2$ Flip-Flops

STEP-2: Obtain the State Diagram

STEP-3: Type of Flip-Flop and Excitation Table

Present State is $Q_n$ and Next State is $Q_{n+1}$

STEP-4: Minimization

STEP-5:Minimized Expression

$T_1 =Q_1\bigoplus Q_2$

$T_2 =Q_1\bigodot Q_2$

Similar Question

edited by
5 votes
5 votes
T1 = XQ1' + X'Q1

T2 = (Q2+Q1)'

sequence is 00,10,11,01,00
X = Q1Q2' + Q1'Q2
1 votes
1 votes

Counter produces:

Q2 Q1

0    0

1    0

1    1

0    1

and so on

T2 or T1 FF toggles depending on the previous outputs produced by both T2 and T1.

If you analyze how counter value changes, you will find T2 toggles when previous outputs are equal else T1 toggles.

T2 = Q2 XNOR Q1

T1 = Q2 XOR Q1

Answer:

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