MADE EASY TEST SERIES

Question

Consider 6 stage pipeline (S₁, S₂, S₃, S₄, S₅, S₆) which allows all the instructions except branch instructions. Processor stops fetching the following instruction after the branch until the target address is available. Target address is available in the S₄ stage. Program contain 40% of branch instructions. All the stages are balanced with a 2.3 GHz clock. MIPS rate of the processor is ________ (in 2 decimal places).

Comments

Through put=   2.3*10⁹/0.6*0+0.4*3+1

                =      1.045*10⁹

                 =     1045MIPS

Answer 1

As target address is available after S₄ stage, 

So, stall cycle is 3

stall frequency =40%

cycle time=$\frac{1}{2.3\times 10^{9}}$=.435 ns.

So, proceesing time= (1+stall cycle$\times$stall frequency)$\times$cycle time

                            =(1+3$\times$4)$\times$0.435=0.957ns=1044.9MIPS

Answer 2

Here we need to find the CPI of each instruction in pipelined system..

So we know :

CPI_pipeline   =  CPI_{ideal pipeline}   +    No of stalls / instruction

Now here stall is due to branch instruction...

So branch penalty  = Stage at which target address is found - 1

                            = 4 - 1

                            = 3

Fraction of branch instruction  =  0.4

Hence CPI            =  1 (CPI of ideal pipeline)  + 0.4 * 3

                            =  2.2

Hence time taken by 1 instruction  =  CPI * Cycle time

                                                   =  CPI / Clock frequency

                                                   =  2.2 / ( 2.3 * 10⁹ )  s

So no of instructions / sec             =  (2.3 * 10⁹)  /  2.2

     no of million ins / sec               =   (2.3 * 1000) / 2.2

                                                   =   1045.46 MIPS

NOTE : wrong calculation by madeeasy

Comments

what is wrong in this????

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The calculation which I have done here is fine..:)

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nothing wrong

might be that is answer key of ME :p

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ok!!

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Habibkhan Sir, what is wrong in this way of calculation:

let us consider that we have 100 instructions.

In the absence of branch instructions, number of clocks required= 1*6 + 99*1= 105 clocks

Now penalty introduced due to branch instructions= 40*3= 120 (since it is given that 40% of the instructions are branch instruction)

hence total time required for executing 100 instructions= (105+120)/(2.3*10^-9)= 97.82ns.

so in 97.82ns, 100 instructions are executed.

So in 1sec, 100/97.82ns = 1022.22*10^6 instructions are executed.

So processor rate is 1022.22MIPS.

Why isnt this correct?

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@Somoshree Datta 5

nothing wrong, but can we apply that formula here?

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Maam why are u taking CPI as 1 when it isnt mentioned in question that the pipeline is working under ideal conditions?

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@Somoshree Datta 5

u written

In the absence of branch instructions, number of clocks required= 1*6 + 99*1= 105 clocks

and then using it as branch

that is not possible 

right?

In branch, we always take ideal CPI=1

And we can use $\left ( 1+stall cycle\times stall freq \right )$

See here http://meseec.ce.rit.edu/eecc551-winter2000/551-12-12-2000.pdf

otherwise, we show me example where u got it's violation

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@srestha maam

i meant that in absence of branch hazards, 100 instructions would take 105 clock cycles to complete in a 6 stage pipeline..but due to branch hazards, it leads to some branch penalty which is given by 40*3=120 cycles.

So extra 120 cycles are needed on top of 105 cycles in order to complete the execution of 100 instructions..

We consider ideal conditions, i.e. CPI=1 only when it is mentioned in question explicitly. In the link given by you, there it is mentioned in brackets that assuming an ideal pipeline of CPI=1. But we generally dont assume ideal cases unless its mentioned.

CHeck this link https://gateoverflow.in/204125/gate2018-50

Here in the selected answer, Digvijay sir has done the entire calculation considering normal case of pipeline architechture where CPI is not exactly equal to 1.

Now in this link https://gateoverflow.in/683/gate2000-12

it is explicitly mentioned in question that "Under ideal conditions" so we consider CPI=1,i.e. an ideal pipeline architechture...

Maam is my reasoning wrong?

 

 

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@Somoshree Datta 5

you r right

but, here mentioned

stages are balanced

And that can pipeline working on ideal condition (how far I am getting)

See this link http://web.cs.iastate.edu/~prabhu/Tutorial/PIPELINE/hazards.html, in balanced or ideal condition we can use CPI=1

ok now?

 

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Yes ma'am, got it now :) thanks :)