36 votes 36 votes Which of the following is true? Unless enabled, a CPU will not be able to process interrupts. Loop instructions cannot be interrupted till they complete. A processor checks for interrupts before executing a new instruction. Only level triggered interrupts are possible on microprocessors. CO and Architecture gate1998 co-and-architecture interrupts normal + – Kathleen asked Sep 25, 2014 • retagged Nov 13, 2017 by Arjun Kathleen 12.1k views answer comment Share Follow See all 3 Comments See all 3 3 Comments reply Manu Thakur commented Jan 9, 2018 reply Follow Share The (C) is false as shown in the below screenshot: Interrupt check happens before the CPU fetches new instruction. 12 votes 12 votes Divy Kala commented Apr 7, 2019 reply Follow Share What about piplelined processors? The fetching cannot wait. 1 votes 1 votes Pranavpurkar commented Dec 3, 2022 reply Follow Share Divy Kala there also it should check. 0 votes 0 votes Please log in or register to add a comment.
Best answer 48 votes 48 votes Answer is (A). Options (B) and (D) are obviously false. A processor checks for the interrupt before FETCHING an instruction, so option (C) is also false. Hardi Shah answered Dec 25, 2015 • edited Sep 15, 2018 by kenzou Hardi Shah comment Share Follow See all 7 Comments See all 7 7 Comments reply Show 4 previous comments KartikGawande commented Nov 12, 2022 reply Follow Share This might seem funny but i took the ‘enabling’ in option A to be of the CPU itself and not the interrupts. Can the option A mean this? 0 votes 0 votes Souvik33 commented Nov 16, 2022 reply Follow Share Fetching comes before execution → checks for interrupts “before execution” → checks for interrupts before “decoding” ..so on So in a MSQ sence opt (C) is also right 0 votes 0 votes Thadymademe commented Nov 27, 2022 reply Follow Share @KartikGawande obviously yess bro , because if the CPU is disabled then how will the interuppt even be processed. 0 votes 0 votes Please log in or register to add a comment.
2 votes 2 votes are both option (a) and (c) TRUE .... explain ??? Option (c) “Polling is like picking up your phone every few seconds to see if you have a call. Interrupts are like waiting for the phone to ring.” CPU senses (checks) interrupt request line after every instruction; if raised,.... correct me http://www.cs.toronto.edu/~demke/469F.06/Lectures/Lecture6.pdf or archive Mithlesh Upadhyay answered Apr 8, 2015 • edited May 6, 2021 by Shiva Sagar Rao Mithlesh Upadhyay comment Share Follow See all 12 Comments See all 12 12 Comments reply Show 9 previous comments akash.dinkar12 commented Jul 6, 2018 reply Follow Share @Swami Patil Option C is wrong because we know that instruction has to pass through various phases(fetching, decoding, executing, writeback ), after completion of instruction CPU has to check for interrupts. CPU can not check interrupts after executing phase.. 1 votes 1 votes gauravkc commented Sep 30, 2018 reply Follow Share Why are we assuming it to be a pipelined system? 0 votes 0 votes Alakhator commented Oct 22, 2019 reply Follow Share Anybody with this toronto pdf? It's saying forbidden 1 votes 1 votes Please log in or register to add a comment.
